<html><head><meta http-equiv="Content-Type" content="text/html; charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; line-break: after-white-space;" class=""><br class=""><div><br class=""><blockquote type="cite" class=""><div class="">On Sep 29, 2017, at 6:10 PM, Stefan Teleman <<a href="mailto:stefan.teleman@gmail.com" class="">stefan.teleman@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class=""><div class="gmail_default" style="font-family:verdana,sans-serif"><br class=""></div><div class="gmail_extra"><br class=""><div class="gmail_quote">On Fri, Sep 29, 2017 at 7:51 PM, Andrew Trick via llvm-dev <span dir="ltr" class=""><<a href="mailto:llvm-dev@lists.llvm.org" target="_blank" class="">llvm-dev@lists.llvm.org</a>></span> wrote:<br class=""><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="HOEnZb"><div class="h5"><br class=""><br class="">
> /*<br class="">
> LDADDALB_LDADDALH_LDADDALW_<wbr class="">LDADDALX = 872, in Sched enum<br class="">
> */<br class="">
<br class="">
</div></div>I bet the problem is that “WriteAtomic” is marked unsupported, so it gets an invalid sched class. The invalid NumMicroOps means that the scheduler will assert if it ever sees that instruction.<br class="">
<br class=""></blockquote><div class=""><br class=""></div><div style="font-family:verdana,sans-serif" class="gmail_default">The scheduler does not assert if it sees LDADDAL, or any other of the LSE instructions on ThunderX2. We've been generating LSE code for months now, with LLVM built in debug+assert+expensive-checks mode.<br class=""></div><div style="font-family:verdana,sans-serif" class="gmail_default"><br class=""></div><div style="font-family:verdana,sans-serif" class="gmail_default">—Stefan</div></div></div></div></div></blockquote><br class=""></div><div>The machine model *should* assert whenever it sees an “unsupported” instruction and the machine model is marked “complete". The scheduler used to have such an assert, but some concessions have been made to handle “incomplete” machine models. Currently, it looks like it picks some default values.</div><div><br class=""></div><div>Can you file a bug showing the relevant part of AArch64SchedThunderX2T99.td (CompleteModel=1, WriteAtomic...), a self-contained dump of the machine instrs before scheduling, and -debug-only="machine-scheduler” output? Failing to catch this at compile time is pretty horrible.</div><div><br class=""></div><div>-Andy</div></body></html>