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<p>Hi Matthias,</p>
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<p>Sorry for the late reply. </p>
<p>Yes, you are correct, I do have optnone attribute on my function. <br>
</p>
<p>I did pass -O0 to the tools. </p>
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<p>For your information, my invocations are as below:</p>
<p><br>
</p>
<p>clang --target=mips-unknown-linux -mips32 test.c -emit-llvm -S</p>
<p>llc -O0 -march=mips -mcpu=mips32 test.ll -o test.s</p>
<p><br>
</p>
<p>Based on the generated .ll file, there is optnone attribute on the function, i am guessing this is due to the default optimization -O0 by clang if not specified.</p>
<p>As for the llc, i tried to invoke it with -O1,-O2,-O3. All of them resulted in failure during the phase "PROCESS IMPLICIT DEFS"</p>
<p>This message showed up:<br>
</p>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" color="#000000" face="Calibri, sans-serif"><b>From:</b> mbraun@apple.com <mbraun@apple.com> on behalf of Matthias Braun <mbraun@apple.com><br>
<b>Sent:</b> Saturday, September 9, 2017 2:06 AM<br>
<b>To:</b> jin chuan see<br>
<b>Cc:</b> llvm-dev@lists.llvm.org<br>
<b>Subject:</b> Re: [llvm-dev] Live Register Spilling</font>
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<div class="">This would be a lot easier to discuss having a concrete example, llc invocations etc.</div>
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<div class="">It sounds like you are using RegAllocFast, have you tried using the optimized register allocators (= make sure you don't have the optnone attribute on your function and are not passing -O0 to the tools).</div>
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<div class="">- Matthias</div>
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<div class="">On Sep 8, 2017, at 12:10 AM, jin chuan see via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org" class="">llvm-dev@lists.llvm.org</a>> wrote:</div>
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<div class="" style="margin-top:0px; margin-bottom:0px">Hi All,<span class="Apple-converted-space"> </span><br class="">
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<br class="">
<div class="" style="margin-top:0px; margin-bottom:0px">I faced some problems while using the BuildMI().</div>
<div class="" style="margin-top:0px; margin-bottom:0px">Currently, i am trying to replace specific MI with a series of new MI.</div>
<div class="" style="margin-top:0px; margin-bottom:0px">I wrote a routine under the processFunctionAfterISel() to detect the targeted MI and replace it accordingly.</div>
<div class="" style="margin-top:0px; margin-bottom:0px">After using BuildMI() to perform my replacement, i realize there are unnecessary spilling and reloading of registers in the assembly generated.</div>
<div class="" style="margin-top:0px; margin-bottom:0px">By checking the llc debug output, i am suspecting that the virtual register states have been completely messed up.</div>
<div class="" style="margin-top:0px; margin-bottom:0px">This is because the spilling and reloading codes are only inserted at the register allocation phase, especially during the state of "Spilling live registers at the end of block".</div>
<div class="" style="margin-top:0px; margin-bottom:0px">These spilling and reloading codes are messing up the assembly generated, and the behavior of the code generated is undetermined.<span class="Apple-converted-space"> </span><br class="">
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<div class="" style="margin-top:0px; margin-bottom:0px">I would like to know is there anything i can do to fix the virtual register use-def relationship?</div>
<div class="" style="margin-top:0px; margin-bottom:0px">Or is there any standard procedure i should follow to handle the MachineOperands while using BuildMI()?</div>
<div class="" style="margin-top:0px; margin-bottom:0px">Any opinions or suggestion are welcomed.<br class="">
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<div class="" style="margin-top:0px; margin-bottom:0px">Regards,</div>
<div class="" style="margin-top:0px; margin-bottom:0px">JC<br class="">
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