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<p class="MsoNormal"><span style="color:#1F497D">Hi,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D">Just to clarify I am looking for a whole machine function analysis not just something restricted to within a machine basic block.
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D">Thanks.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D">Regards,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D">Venu.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b>From:</b> Raghavan, Venugopal <br>
<b>Sent:</b> Saturday, September 02, 2017 12:56 PM<br>
<b>To:</b> llvm-dev@lists.llvm.org<br>
<b>Subject:</b> Reaching definitions on Machine IR post register allocation<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Hi,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Given a definition of a register by a machine instruction in the Machine IR post register allocation, I would like to compute the set of uses of this register reached by this definition.<o:p></o:p></p>
<p class="MsoNormal">Does LLVM already have this kind of analysis I can use? Otherwise, I will have to implement a reaching definitions analysis which would be a little involved since it would need to work on a non-SSA IR form.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">If something already exists that would be very helpful for me.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Thanks.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Regards,<o:p></o:p></p>
<p class="MsoNormal">Venugopal Raghavan.<o:p></o:p></p>
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