<div dir="ltr">VEX_4V tells the encoder to use the VEX.vvvv field to encode one of the operands. Without it the encoder assumes that the destination and one of the sources must be the same physical register.<div><br></div><div>TA indicates which of the opcode maps the instruction belongs to. This corresponds to encoding 0x3 of the VEX.mmmmm field.</div></div><div class="gmail_extra"><br clear="all"><div><div class="gmail_signature" data-smartmail="gmail_signature">~Craig</div></div>
<br><div class="gmail_quote">On Mon, Sep 4, 2017 at 4:01 PM, hameeza ahmed <span dir="ltr"><<a href="mailto:hahmed2305@gmail.com" target="_blank">hahmed2305@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Sorry to ask but what does it mean to put both?</div><div class="HOEnZb"><div class="h5"><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Sep 5, 2017 at 4:01 AM, Craig Topper <span dir="ltr"><<a href="mailto:craig.topper@gmail.com" target="_blank">craig.topper@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Leave TA. Put both.</div><div class="gmail_extra"><span class="m_6258452947298505462HOEnZb"><font color="#888888"><br clear="all"><div><div class="m_6258452947298505462m_1521055022463006936gmail_signature" data-smartmail="gmail_signature">~Craig</div></div></font></span><div><div class="m_6258452947298505462h5">
<br><div class="gmail_quote">On Mon, Sep 4, 2017 at 4:00 PM, hameeza ahmed <span dir="ltr"><<a href="mailto:hahmed2305@gmail.com" target="_blank">hahmed2305@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">You are right. But when i defined my instruction as follows:<div><span style="font-size:12.8px">def P_256B_VADD : I<0xE1, MRMDestReg, (outs VRP_2048:$dst), (ins VRP_2048:$src1, VRPIM_2048:$src2),"P_256B_</span><span style="font-size:12.8px">VADD<wbr>\t{$src1, $src2, $dst|$dst, $src1, $src2}", [(set VRP_2048:$dst, (add (v64i32 VRP_2048:$src1), (v64i32 VRP_2048:$src2)))]>, VEX_4V;</span><br></div><div><span style="font-size:12.8px"><br></span></div><div><span style="font-size:12.8px">I get opcode conflicts? Then what to do?</span></div></div><div class="m_6258452947298505462m_1521055022463006936HOEnZb"><div class="m_6258452947298505462m_1521055022463006936h5"><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Sep 5, 2017 at 3:51 AM, Craig Topper <span dir="ltr"><<a href="mailto:craig.topper@gmail.com" target="_blank">craig.topper@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">That is not correct. You should add VEX_4V. TA tells the X86 encoder that the instruction opcode belongs on the 3 byte opcode 0x0F 0x3A page in the Intel manual.</div><div class="gmail_extra"><span class="m_6258452947298505462m_1521055022463006936m_-6994195147674020678HOEnZb"><font color="#888888"><br clear="all"><div><div class="m_6258452947298505462m_1521055022463006936m_-6994195147674020678m_-7479639450761948360gmail_signature" data-smartmail="gmail_signature">~Craig</div></div></font></span><div><div class="m_6258452947298505462m_1521055022463006936m_-6994195147674020678h5">
<br><div class="gmail_quote">On Mon, Sep 4, 2017 at 3:38 PM, hameeza ahmed <span dir="ltr"><<a href="mailto:hahmed2305@gmail.com" target="_blank">hahmed2305@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Thank You.<div><br></div><div>My add instruction has TA as follows:</div><div><br></div><div><div>def P_256B_VADD : I<0xE1, MRMDestReg, (outs VRP_2048:$dst), (ins VRP_2048:$src1, VRPIM_2048:$src2),"P_256B_VADD<wbr>\t{$src1, $src2, $dst|$dst, $src1, $src2}", [(set VRP_2048:$dst, (add (v64i32 VRP_2048:$src1), (v64i32 VRP_2048:$src2)))]>, TA;</div></div><div><br></div><div>so i defined;</div><div><br></div><div><div> bool HasTA = TSFlags & X86II::TA; in x86MCCodeEmitter.cpp</div></div><div><br></div><div>then used this condition;</div><div><br></div><div><div>if(HasTA)</div><div> ++SrcRegNum;</div></div><div><br></div><div>now getting no error.</div><div><br></div><div>please tell me whether my method is correct? Also please confirm this whether i need to make changes in MC framework to emit binary code of my vector instructions. So far i made no changes or additions in MC framework or any of the file (except the above discussed) and still getting the correct machine code.</div><div><br></div><div>Is it right way?</div><div><br></div><div><br></div></div><div class="m_6258452947298505462m_1521055022463006936m_-6994195147674020678m_-7479639450761948360HOEnZb"><div class="m_6258452947298505462m_1521055022463006936m_-6994195147674020678m_-7479639450761948360h5"><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Sep 5, 2017 at 3:29 AM, Craig Topper <span dir="ltr"><<a href="mailto:craig.topper@gmail.com" target="_blank">craig.topper@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Does your ADD instruction have VEX_4V or EVEX_4V as part of its declaration in the td file?</div><div class="gmail_extra"><span class="m_6258452947298505462m_1521055022463006936m_-6994195147674020678m_-7479639450761948360m_2927941512614751652HOEnZb"><font color="#888888"><br clear="all"><div><div class="m_6258452947298505462m_1521055022463006936m_-6994195147674020678m_-7479639450761948360m_2927941512614751652m_4096969530663170006gmail_signature" data-smartmail="gmail_signature">~Craig</div></div></font></span><div><div class="m_6258452947298505462m_1521055022463006936m_-6994195147674020678m_-7479639450761948360m_2927941512614751652h5">
<br><div class="gmail_quote">On Mon, Sep 4, 2017 at 2:11 PM, hameeza ahmed <span dir="ltr"><<a href="mailto:hahmed2305@gmail.com" target="_blank">hahmed2305@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Hello,<div>I am trying to emit binary for my implemented vector instructions. Although yet i havent done any change or addition in MC framework, For vector load instruction there are no error coming. But for vector add </div><div><br></div><div>instruction is something like this;</div><div><br></div><div><div>> %R_0_REG2048b_1<def> = P_256B_VADD %R_0_REG2048b_1<kill>, %R_0_REG2048b_0<kill></div></div><div><br></div><div>I am getting the following error:</div><div><br></div><div><div>Unknown immediate size</div><div>UNREACHABLE executed at /lib/Target/X86/MCTargetDesc/X<wbr>86BaseInfo.h:574!</div></div><div><br></div><div><br></div><div> i made extensive use of gdb and after debugging i found the line with issue in X86MCCodeEmitter.cpp.</div><div><br></div><div>Here NumOps=3 (all registers). and CurOp is 1st initialized to 0.</div><div><br></div><div>then, the following code gets executed;</div><div><br></div><div><div>case X86II::MRMDestReg: {</div><div> EmitByte(BaseOpcode, CurByte, OS);</div><div> unsigned SrcRegNum = CurOp + 1; //SrcRegNum=1</div></div><div><div>EmitRegModRMByte(MI.getOperand<wbr>(CurOp),</div><div> GetX86RegNum(MI.getOperand(Sr<wbr>cRegNum)), CurByte, OS);</div><div> CurOp = SrcRegNum + 1;</div><div> break;</div><div> }</div></div><div>so here CurOp becomes 2.</div><div><br></div><div>After this;</div><div><br></div><div>it comes to;</div><div><div>else {</div><div> // If there is a remaining operand, it must be a trailing immediate. Emit it</div><div> // according to the right size for the instruction. Some instructions</div><div> // (SSE4a extrq and insertq) have two trailing immediates.</div><div> while (CurOp != NumOps && NumOps - CurOp <= 2) {</div><div> EmitImmediate(MI.getOperand(Cu<wbr>rOp++), MI.getLoc(),</div><div> X86II::getSizeOfImm(TSFlags), getImmFixupKind(TSFlags),</div><div> CurByte, OS, Fixups);</div><div> }</div></div><div><br></div><div>here CurOp=2 !=NumOps=3 && 3-2<=2</div><div>so while condition is satisfied and it goes to emitimmediate which is wrong and there prints error message.</div><div><br></div><div>Since, there are no immediate involved in instruction, it should not go to emitimmediate. How to solve this issue?</div><div><br></div><div>Please help. </div><div><br></div><div>Thank You</div></div>
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