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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">This is called rematerialization, and the register allocator can already do it but there are various constraints.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">For it happen:<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">* The instruction needs to be marked as isReMaterializable in the tablegen file<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">* TargetInstrInfo::isTriviallyReMaterializable needs to return true for the instruction<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">* InlineSpiller and LiveRangeEdit in lib/Codegen are the things that actually do the rematerialization, and it<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"> may be worthwhile looking there<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">* The base register of the load needs to be guaranteed to be live at the place where it is rematerialized, e.g.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"> in lib/Target/ARM/ARMInstrThumb.td the tLDRpci instruction is rematerializable because the base in the<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"> pc register which is always available, but loads in general aren’t.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">John<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> llvm-dev [mailto:llvm-dev-bounces@lists.llvm.org]
<b>On Behalf Of </b>Ehsan Amiri via llvm-dev<br>
<b>Sent:</b> 17 August 2017 17:49<br>
<b>To:</b> llvm-dev<br>
<b>Subject:</b> [llvm-dev] A problem with register allocator<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">Hi<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> <o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">I have a code pattern like this:<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> <o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">Load value 1 from mem<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">Load value 2 from mem<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> <o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">For (…) {<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> Use value 2<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> Use value 1<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">}<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> <o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">During register allocations values loaded are spilled and I end up with this pattern:<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> <o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">Load value 1 from mem<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">Store value 1 to stack<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">Load value 2 from mem<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">Store value 2 to stack<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> <o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">For (…) {<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> Load value 2 from stack<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> Use value 2<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> Load value 1 from stack<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> Use value 1<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">}<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> <o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">At least for my case, I prefer to load directly from memory inside the loop. From what I have heard, this is a known issue with the register allocator. I have a few questions:<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> <o:p></o:p></span></p>
<p style="mso-margin-top-alt:0cm;margin-right:0cm;margin-bottom:0cm;margin-left:36.0pt;margin-bottom:.0001pt">
<span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">1-</span><span style="font-size:7.0pt"> </span><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">Has there been any attempt to fix this? If yes, what was the experience when
dealing with tradeoffs (for example if value 1 and value 2 are far apart in memory and loop trip count is high, the current codegen might be better)<o:p></o:p></span></p>
<p style="mso-margin-top-alt:0cm;margin-right:0cm;margin-bottom:0cm;margin-left:36.0pt;margin-bottom:.0001pt">
<span style="font-size:11.0pt;font-family:"Calibri","sans-serif""><o:p> </o:p></span></p>
<p style="mso-margin-top-alt:0cm;margin-right:0cm;margin-bottom:0cm;margin-left:36.0pt;margin-bottom:.0001pt">
<span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">2-</span><span style="font-size:7.0pt"> </span><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">If I want to experiment with some fixes for this, where in the register allocator
code I should look?<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif""> <o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif"">Thanks<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif";color:#888888">Ehsan<o:p></o:p></span></p>
<p><span style="font-size:10.5pt;font-family:"Arial","sans-serif";color:#888888"> <o:p></o:p></span></p>
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<p class="MsoNormal"><span style="font-size:10.5pt;font-family:"Arial","sans-serif""><o:p> </o:p></span></p>
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