main:BB#0 entry
  From: %vreg2<def> = MOVSDrm %RIP, 1, %noreg, <cp#0>, %noreg; mem:LD8[ConstantPool] FR64:%vreg2
    To: CALL64pcrel32 <ga:@_ZNSo9_M_insertIdEERSoT_>, <regmask %BH %BL %BP %BPL %BX %EBP %EBX %RBP %RBX %R12 %R13 %R14 %R15 %R12B %R13B %R14B %R15B %R12D %R13D %R14D %R15D %R12W %R13W %R14W %R15W>, %RSP<imp-use>, %RDI<imp-use>, %XMM0<imp-use,kill>, %RSP<imp-def>, %RAX<imp-def>
 RegionInstrs: 3
ScheduleDAGMILive::schedule starting
GenericScheduler RegionPolicy:  ShouldTrackPressure=1 OnlyTopDown=0 OnlyBottomUp=1
Max Pressure: GR8_ABCD_H=1
GR8_ABCD_L=1
VR128L=1
GR32_TC=2
LOW32_ADDR_ACCESS_with_sub_32bit+GR64_NOREX_and_GR64_TCW64=2
GR64_NOREX_and_GR64_TC=2
LOW32_ADDR_ACCESS_with_sub_32bit+GR64_NOREX_and_GR64_TC=2
FR32=1
GR64_NOREX=2
GR64_TCW64=2
LOW32_ADDR_ACCESS_with_sub_32bit+GR64_TCW64=2
GR64_TC=2
LOW32_ADDR_ACCESS_with_sub_32bit+GR64_TC=2
GR64_TC+GR64_TCW64=2
GR8=2
GR8+GR64_NOREX=2
GR8+GR64_TCW64=2
GR64_NOREX+GR64_TC=2
GR8+GR64_TC=2
FR32X=1
GR16=2
Live In: 
Live Out: AH AL
Live Thru: 
Top Pressure:

Bottom Pressure:
VR128L=1
GR64_NOREX_and_GR64_TC=1
LOW32_ADDR_ACCESS_with_sub_32bit+GR64_NOREX_and_GR64_TC=1
FR32=1
GR64_NOREX=1
GR64_TC=1
LOW32_ADDR_ACCESS_with_sub_32bit+GR64_TC=1
GR64_TC+GR64_TCW64=1
GR8=1
GR8+GR64_NOREX=1
GR8+GR64_TCW64=1
GR64_NOREX+GR64_TC=1
GR8+GR64_TC=1
FR32X=1
GR16=1
Excess PSets: 
SU(0):   %vreg2<def> = MOVSDrm %RIP, 1, %noreg, <cp#0>, %noreg; mem:LD8[ConstantPool] FR64:%vreg2
  # preds left       : 0
  # succs left       : 1
  # rdefs left       : 0
  Latency            : 4
  Depth              : 0
  Height             : 4
  Successors:
   data SU(2): Latency=4 Reg=%vreg2
  Pressure Diff      : FR32 -1    FR32X -1

SU(1):   %EDI<def,dead> = MOV32ri64 <ga:@_ZSt4cout>, %RDI<imp-def>
  # preds left       : 0
  # succs left       : 1
  # rdefs left       : 0
  Latency            : 1
  Depth              : 0
  Height             : 1
  Successors:
   ord  SU(4294967295) *: Latency=1
  Pressure Diff      : GR64_NOREX_and_GR64_TC -1    LOW32_ADDR_ACCESS_with_sub_32bit+GR64_NOREX_and_GR64_TC -1    GR64_NOREX -1    GR64_TC -1    LOW32_ADDR_ACCESS_with_sub_32bit+GR64_TC -1    GR64_TC+GR64_TCW64 -1    GR8 -1    GR8+GR64_NOREX -1    GR8+GR64_TCW64 -1    GR64_NOREX+GR64_TC -1    GR8+GR64_TC -1    GR16 -1

SU(2):   %XMM0<def> = COPY %vreg2; FR64:%vreg2
  # preds left       : 1
  # succs left       : 1
  # rdefs left       : 0
  Latency            : 0
  Depth              : 4
  Height             : 0
  Predecessors:
   data SU(0): Latency=4 Reg=%vreg2
  Successors:
   ord  SU(4294967295) *: Latency=0
  Pressure Diff      : VR128L -1