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<div class="WordSection1">
<p class="MsoNormal"><a name="_____replyseparator"></a>Hi all,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><b><u>Memory fold tables</u></b>: Two way mapping of each register-form instruction to its corresponding memory-form instruction. E.g. Mapping 'X86::ADD32rr' to 'X86::ADD32rm'.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Few months ago I started an effort to auto-generate the X86 memory folding tables currently held under lib/Target/X86/X86InstInfo.cpp as
<b>huge manually-maintained</b> static arrays.<o:p></o:p></p>
<p class="MsoNormal">Automating the tables would reduce the <b>maintenance burden</b> for developers to repeatedly update them with every new (foldable) instruction added to X86 backend, and would provide us with all the
<b>missing entries</b> (mostly AVX512 instructions).<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">After considering different approaches for generating the tables, it was decided that a
<b>TableGen backend</b> would fit our needs the best, using the <b>encoding information</b> of the instructions (from .td files) to apply the matching between pairs.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Our main assumption was that two forms of the same instruction (register & memory forms)
<b>must share the same encoding information except for the part responsible for “How are the parameters passed to the instruction”</b>, where one version defines one of its parameters to be a register while the other version defines it to be a memory operand,
and all other parameters passed the same way in both versions.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Throughout the development of the backend, some <b>exceptions</b> were discovered. Some instructions has different behavior in their register and memory forms, for example, “bt” instruction (bit-test), which in its register form the relevant
bits of the register parameter are the first 4, 5 or 6 bits (depending on mode and register size) while in the memory-folded instruction, the relevant bits of the memory operand are the first 16, 32 or 64 bits.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">A TableGen backend was created for this purpose and <b>committed</b> in
<a href="https://reviews.llvm.org/rL304088"><span style="color:windowtext">https://reviews.llvm.org/rL304088</span></a>, including a small list of exceptions for cases similar to the bit-test instruction above.
<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">After the patch was committed, two more exceptions were found which led to
<b>reverting</b> the patch (<a href="https://reviews.llvm.org/rL304762"><span style="color:windowtext">https://reviews.llvm.org/rL304762</span></a>).<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Looking for <b>safe-alternatives</b> that will assure us correctness of each added entry, we narrowed our options to the following 3:<o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-18.0pt;mso-list:l3 level1 lfo2"><![if !supportLists]><span style="mso-list:Ignore">1-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span>Recommitting TableGen’s backend as “disable by default”:<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l1 level1 lfo4">
<![if !supportLists]><span style="mso-list:Ignore">a-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span>prepare a <b>full</b> instruction list of the
<b>exceptions</b> in X86 ISA.<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l1 level1 lfo4">
<![if !supportLists]><span style="mso-list:Ignore">b-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span>Mark these instructions with special flag to
<b>indicate illegal folding</b>.<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l1 level1 lfo4">
<![if !supportLists]><span style="mso-list:Ignore">c-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span><b>Integrate</b> the backend into llorg while
<u>disabling it by default</u>.<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l1 level1 lfo4">
<![if !supportLists]><span style="mso-list:Ignore">d-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span>Provide <b>a compile-time validation</b> mechanism to make sure the pass does not break (as it’s not included in LLVM’s build).<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l1 level1 lfo4">
<![if !supportLists]><span style="mso-list:Ignore">e-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span><b>Run</b> the pass every defined period of time (1 week/2 weeks/1 month/2 months):<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:72.0pt;text-indent:-18.0pt;mso-list:l4 level1 lfo6">
<![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span dir="LTR"></span>If changes appear (new entries):<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:90.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo8">
<![if !supportLists]><span style="mso-list:Ignore">-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span>Make sure the entries are legal.<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:90.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo8">
<![if !supportLists]><span style="mso-list:Ignore">-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span>If they are not, add them to the exception list.<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:72.0pt;text-indent:-18.0pt;mso-list:l4 level1 lfo6">
<![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span dir="LTR"></span>If any changes made, commit them.<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:72.0pt"><o:p> </o:p></p>
<p class="MsoListParagraph" style="text-indent:-18.0pt;mso-list:l3 level1 lfo2"><![if !supportLists]><span style="mso-list:Ignore">2-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span>Recommitting TableGen’s backend while limiting the instructions to AVX512 and earlier.<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l2 level1 lfo10">
<![if !supportLists]><span style="mso-list:Ignore">a-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span>prepare a <b>full</b> instruction list of the
<b>exceptions</b> in X86 ISA.<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l2 level1 lfo10">
<![if !supportLists]><span style="mso-list:Ignore">b-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span>Mark these instructions with special flag to
<b>indicate illegal folding</b>.<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l2 level1 lfo10">
<![if !supportLists]><span style="mso-list:Ignore">c-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span><b>Integrate</b> the backend into llorg
<u>while limiting the generated instructions to be part of AVX512 extension or earlier</u>.<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l2 level1 lfo10">
<![if !supportLists]><span style="mso-list:Ignore">d-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span>If a new generation of instructions is added, go back to step ‘a’, and after we are sure everything is ok allow these instructions to be tablegened.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoListParagraph" style="text-indent:-18.0pt;mso-list:l3 level1 lfo2"><![if !supportLists]><span style="mso-list:Ignore">3-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span>Give up on the auto-generation idea and
<b>manually update</b> the current tables iteratively with new chunks of instructions until full state is achieved.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">P.s. The TableGen backend emits more than 5200 entries, while the known exception at this point are ~20.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">We prefer options #1/#2 as they remove the manual maintenance of these huge tables where there is high potential of adding new bugs, and reduce it to a one-man once-a-month/once for each new instruction generatiom work.<o:p></o:p></p>
<p class="MsoNormal">Please share your opinions with us.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Thanks,<o:p></o:p></p>
<p class="MsoNormal">Ayman Musa<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><span style="font-family:"Arial",sans-serif"><o:p> </o:p></span></p>
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