Hi Lama,<div><br></div><div>This is related to PR 32755 filed by you. But patch will not be able to fold beyond scaling factor 2. </div><div><br></div><div>So to take care of cases which fold to scaling factor > 2 we may have to move extraction logic LEAs to a new/existing pass before MI Scheduling as has been proposed.</div><div><br></div><div>Kindly provide your comments/suggestions.</div><div><br></div><div>Thanks,</div><div>Jatin<br><br>On Sunday, July 9, 2017, Saba, Lama <<a href="mailto:lama.saba@intel.com">lama.saba@intel.com</a>> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
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<p class="MsoNormal"><a name="m_197328370129375057__MailEndCompose"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1f497d">Is this an RFC for (an expansion of) the patch you already have
</span></a><a href="https://reviews.llvm.org/D35014" target="_blank"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">https://reviews.llvm.org/<wbr>D35014</span></a><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1f497d">? Or are you planning
on making a different design? <u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1f497d">Thanks,<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1f497d">Lama<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> Jatin Bhateja [mailto:<a href="javascript:_e(%7B%7D,'cvml','jatin.bhateja@gmail.com');" target="_blank">jatin.bhateja@gmail.<wbr>com</a>]
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<b>Sent:</b> Sunday, July 9, 2017 9:21 AM<br>
<b>To:</b> llvm-dev <<a href="javascript:_e(%7B%7D,'cvml','llvm-dev@lists.llvm.org');" target="_blank">llvm-dev@lists.llvm.org</a>><br>
<b>Cc:</b> <a href="javascript:_e(%7B%7D,'cvml','llvm-dev@redking.me.uk');" target="_blank">llvm-dev@redking.me.uk</a>; Saba, Lama <<a href="javascript:_e(%7B%7D,'cvml','lama.saba@intel.com');" target="_blank">lama.saba@intel.com</a>><br>
<b>Subject:</b> RFC: Identification of LEA instructions with complex addressing mode<u></u><u></u></span></p>
<p class="MsoNormal"><u></u> <u></u></p>
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<p class="MsoNormal"> Current state:<u></u><u></u></p>
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<p class="MsoNormal"><u></u> <u></u></p>
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<p class="MsoNormal"> 1/ LEA with complex addressing mode are supported by Intel micro architectures after Nehalem.<u></u><u></u></p>
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<p class="MsoNormal"><u></u> <u></u></p>
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<p class="MsoNormal"> 2/ LEA detection is being done during SelectionDAG based instruction selection through<u></u><u></u></p>
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<p class="MsoNormal"> addressing mode based complex pattern matching. <u></u><u></u></p>
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<p class="MsoNormal"><u></u> <u></u></p>
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<p class="MsoNormal"> 3/ This does not identify LEA patterns beyond Scaling factor 1.<u></u><u></u></p>
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<p class="MsoNormal"> e.g.<u></u><u></u></p>
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<p class="MsoNormal"> T1 = A + B;<u></u><u></u></p>
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<p class="MsoNormal"> T2 = T1 + B;<u></u><u></u></p>
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<p class="MsoNormal"> T3 = T2 + B;<u></u><u></u></p>
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<p class="MsoNormal"> T4 = T3 + 10;<u></u><u></u></p>
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<p class="MsoNormal"> T5 = T4 + 20;<u></u><u></u></p>
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<p class="MsoNormal"> T6 = T5 + B<u></u><u></u></p>
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<p class="MsoNormal"> <u></u><u></u></p>
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<p class="MsoNormal"> Above sequence can be folded to <u></u><u></u></p>
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<p class="MsoNormal"> <u></u><u></u></p>
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<p class="MsoNormal"> LEA 30( A , 4 , B); <u></u><u></u></p>
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<p class="MsoNormal"> <u></u><u></u></p>
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<p class="MsoNormal"> where BASE = A, SCALE = 4, INDEX = B and OFFSET = 30 <u></u><u></u></p>
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<p class="MsoNormal"> <u></u><u></u></p>
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<p class="MsoNormal"> 4/ Control flow information is not present at SelectionDAG level, as SelectionDAG based selection<u></u><u></u></p>
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<p class="MsoNormal"> work over a single BasicBlock at a time. Which makes it difficult to avoid generation of<u></u><u></u></p>
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<p class="MsoNormal"> complex LEA with 3 operands (even with Scale=1) within Loops.<u></u><u></u></p>
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<p class="MsoNormal"><u></u> <u></u></p>
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<p class="MsoNormal"> Proposal:<u></u><u></u></p>
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<p class="MsoNormal"><u></u> <u></u></p>
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<p class="MsoNormal"> 1/ To have a pre-RA pass to identify LEAs with dense folding. By dense folding I mean scale factor greater than 1. <u></u><u></u></p>
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<p class="MsoNormal"><u></u> <u></u></p>
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<p class="MsoNormal"> 2/ Since this pass will run over MachineInstrs so it will be usable for FastISel and Global ISel based flows also which <u></u><u></u></p>
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<p class="MsoNormal"> bypass SelectionDAG. <u></u><u></u></p>
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<p class="MsoNormal"><u></u> <u></u></p>
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<p class="MsoNormal"> 3/ At MI level we have control flow Analysis info in the form of MachineDominatorTree and MachineLoopInfo<u></u><u></u></p>
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<p class="MsoNormal"> to avoid formation of LEAs in loops.<u></u><u></u></p>
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<p class="MsoNormal"><u></u> <u></u></p>
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<p class="MsoNormal"> 4/ Perform CSE over dense LEAs (which have Scale factor > 1) to factor out overlapping computations.<u></u><u></u></p>
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<p class="MsoNormal"> When two LEAs share BASE , INDEX and OFFSET but have different SCALE we can<u></u><u></u></p>
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<p class="MsoNormal"> take out the common complex LEA and generate a simple LEA with legal Scale. <u></u><u></u></p>
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<p class="MsoNormal"> e.g. <u></u><u></u></p>
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<p class="MsoNormal"> <u></u><u></u></p>
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<p class="MsoNormal"> LEA1 : RES1 = LEA 10( A , 4 , B) <u></u><u></u></p>
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<p class="MsoNormal"> LEA2 : RES2 = LEA 10( A , 8 , B)<u></u><u></u></p>
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<p class="MsoNormal"> <u></u><u></u></p>
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<p class="MsoNormal"> can be converted to <u></u><u></u></p>
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<p class="MsoNormal"> <u></u><u></u></p>
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<p class="MsoNormal"> LEA1 : RES1 = LEA 10( A , 4 , B)<u></u><u></u></p>
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<p class="MsoNormal"> LEA2 : RES2 = LEA (RES1 , 4 , B)<u></u><u></u></p>
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<p class="MsoNormal"> <u></u><u></u></p>
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<p class="MsoNormal"> 5/ Disintegration of complex LEAs with Scale 1 to simple LEA + ADD which is already being handled during <u></u><u></u></p>
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<p class="MsoNormal"> FixupLEAPass.<u></u><u></u></p>
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<p class="MsoNormal"><u></u> <u></u></p>
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<p class="MsoNormal">Kindly drop your suggestions/comments. <u></u><u></u></p>
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<p class="MsoNormal"><u></u> <u></u></p>
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<p class="MsoNormal">Thanks,<u></u><u></u></p>
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<p class="MsoNormal">Jatin Bhateja<u></u><u></u></p>
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<p class="MsoNormal"><u></u> <u></u></p>
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<p>------------------------------<wbr>------------------------------<wbr>---------<br>
Intel Israel (74) Limited</p>
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</blockquote></div><br><br>-- <br>Jatin Bhateja<br>