<div dir="ltr">Ohh, that makes sense. And is the reason the first instruction doesn't get deleted because the ExpandPseudoInstructions pass occurs after Register Allocation and machine dead code elimination?<div><br></div><div>-Dilan</div></div><br><div class="gmail_quote"><div dir="ltr">On Fri, Jul 7, 2017 at 12:37 PM Friedman, Eli <<a href="mailto:efriedma@codeaurora.org">efriedma@codeaurora.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">On 7/7/2017 12:10 PM, Dilan Manatunga wrote:<br>
> My bad for not looking further. I'm still somewhat confused though.<br>
> MOVCCr gets expanded in the ARMExpandPseudoInsts pass, and it still<br>
> seems only a case of one instruction replacing the other.<br>
<br>
The output of MOVCCr is tied to the "false" input using RegConstraint.<br>
The register allocator puts the "false" value into the destination<br>
register, then MOVCCr gets expanded to a predicated MOVr which moves the<br>
"true" value into the destination register.<br>
<br>
-Eli<br>
<br>
--<br>
Employee of Qualcomm Innovation Center, Inc.<br>
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project<br>
<br>
</blockquote></div>