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<p><span style="font-size: 12pt;">>Hi,</span><br>
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<div><span style="font-size: 12pt;">>I actively working on LLVM project with SPIR (no V here), and would love to see SPIR-V get integrated into LLVM.</span></div>
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<div><span style="font-size: 12pt;">>Does this SPIR-V "backend" support reading SPIR-V and generate LLVM IR in-memory representation?</span></div>
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<div><span style="font-size: 12pt;">Yes it does.</span><span style="font-size: 12pt;"><br>
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<div><span style="font-size: 12pt;">>Alternatively:</span></div>
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<div><span style="font-size: 12pt;">>Since SPIR-V is very close to LLVM IR, it may be a bad idea to translate LLVM IR to machine IR then to SPIR-V, direct LLVM >IR/SPIR-V translation maybe simpler.</span></div>
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<div><span style="font-size: 12pt;"> </span><span style="font-family: Helvetica; font-size: 12pt;">Having a look through the GlobalISel page makes me think the same, at least without looking at how web assembly/NVPTX deal with register banks.</span></div>
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<div><span style="font-size: 12pt;">>In this case, we consider SPIR-V as an IO format instead of a backend. we can introduce a special IR writer and IR reader >that write SPIR-V from LLVM IR in-memory representation and read SPIR-V to generated LLVM IR in-memory
>representation. This is also not hard to integrate into clang/opt and I had done similar things (not SPIR-V though)</span></div>
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<div><span style="font-size: 12pt;">>In this case, it will be opt that read and generate SPIR-V, instead of llc.</span></div>
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<div><span style="font-size: 12pt;">>This allow us to read SPIR-V into the pass pipeline and optimize them.</span></div>
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<span style="font-size: 12pt;">That sounds like a good idea, except that it would have to be a target I/O hybrid because an I/O format having its own intrinsics I think is even weirder than a target that doesn’t use ISel/MC (all of the previous points about
reasons for being a target still stand). Though a target I/O hybrid is pretty weird. A target for the forward compilation, I/O for reverse? Also take a look at llvm-spirv [1], which does the interconversions, well delegates the interconversions to the library.</span></div>
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<span style="font-size: 12pt;">The only problem for opt would be the target triple, i.e. want to output for AMDGPU need the triple to be correct and then also translate all the intrinsics over. Perhaps for the reverse i.e. consumption of SPIR-V, something like
libclc[2] would be the way to go (and an equivalent for Vulkan)?</span></div>
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<span style="font-size: 12pt;">It is also worth noting that all these same quandaries would apply if/when MS decide to upstream their DXIL, since it is effective the same thing but different.</span></div>
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<div style="font-family: Helvetica; font-size: 12px;"><span style="font-size: 12pt;">[1]:</span><a href="https://github.com/thewilsonator/llvm-tool-spirv" id="LPlnk685562" previewremoved="true"><span style="font-size: 12pt;">https://github.com/thewilsonator/llvm-tool-spirv</span></a></div>
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<div style="font-family: Helvetica; font-size: 12px;"><span style="font-size: 12pt;">[2]:</span><a href="http://libclc.llvm.org/" id="LPlnk136023" previewremoved="true"><span style="font-size: 12pt;">http://libclc.llvm.org</span></a><span style="font-size: 12pt;"> </span></div>
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