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I note that there was a talk recently at EuroLLVM SPIR-V and LLVM about and so I want to get this message out soon so as to avoid duplicated effort.
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<div class="">I have an up to date backend for SPIR-V on an up to date fork (~2-3 weeks behind) of LLVM, transplanted and “modernised” from Khronos’ SPIRV-LLVM that I plan on integrating into LLVM trunk. While it is usable in it’s current form there are several
issues.</div>
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<div class=""><span class="Apple-tab-span" style="white-space:pre"></span>SPIRV-LLVM’s SPIRV support is not a real backend and does not live in /lib/Target/SPIRV. This has been solved, SPIRV is now a proper target(s). I have not copied the tests across yet,
and they will need to be updated in light of the changes made/being made below.</div>
<div class=""><span class="Apple-tab-span" style="white-space:pre"></span>It only support’s the OpenCL “flavour” of SPIRV, but not the Vulkan. I plan on eventually supporting this but its priority is less than that of mainline integration.</div>
<div class=""><span class="Apple-tab-span" style="white-space:pre"></span>Intrinsics (for both Core and OpenCL extension instructions, Vulkan to follow) are done through C++ "Itanium with extensions” mangling. I plan to convert these to a table-gen format and
cull the associated mangling code..</div>
<div class=""><span class="Apple-tab-span" style="white-space:pre"></span>Likewise the instruction format is currently done through a home-brew table format, which I am in the process of converting to table-gen. The core instructions are almost complete, but
I haven’t started on the OpenCL instructions.</div>
<div class=""><span class="Apple-tab-span" style="white-space:pre"></span>As noted in the talk the textual representation is different from the the reference implementation. I see no advantage of the current format over the reference implementation’s format,
infact theirs is much easier to read, This is a low priority.</div>
<div class=""><span class="Apple-tab-span" style="white-space:pre"></span>The instruction table-gen tables contain a significant number of critical non-instruction tables (there are no registers) and therefore a proper table-gen backend needs to be written
to accomodate for this. Required.</div>
<div class=""><span class="Apple-tab-span" style="white-space:pre"></span>There are some LLVM “infrastructure” things (TargetInfo, MCTargetDesc) that I have stubs in order to get LLVM to compile, I have no idea what I’m doing and those were mostly adapted from
Sparc and RISCV. Due to the lack of a Dyld and the fact that SPIR-V is intermediate format, there is no point of a jit, Simple optimisations (CSE,DCE, some very simple inlining) would be nice to have, as would DebugInfo support.</div>
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<div class="">The code is available at my GitHub: </div>
<div class="">SPIRV backend <a href="https://github.com/thewilsonator/llvm-target-spirv" class="">https://github.com/thewilsonator/llvm-target-spirv</a> </div>
<div class="">LLVM <a href="https://github.com/thewilsonator/llvm/tree/compute" class="">https://github.com/thewilsonator/llvm/tree/compute</a> </div>
<div class="">should you want to inspect/offer advice.</div>
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<div class="">I am very busy until about July, but I just want to put this out here to gather interest / feedback / contributors.</div>
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<div class="">Thanks,</div>
<div class="">Nicholas Wilson</div>
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