<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Sat, Mar 4, 2017 at 1:19 PM, Bruce Hoult <span dir="ltr"><<a href="mailto:bruce@hoult.org" target="_blank">bruce@hoult.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">If your target does not have SHL then why don't you simply disable converting MUL to SHL?<div><br></div></div></blockquote><div>MUL is converted to SHL by target independent passes when second operand is power of 2.</div><div><br></div><div>-VivekĀ </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div></div></div><div class="HOEnZb"><div class="h5"><div class="gmail_extra"><br><div class="gmail_quote">On Sat, Mar 4, 2017 at 8:22 AM, vivek pandya via llvm-dev <span dir="ltr"><<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span><br><br>On Saturday, March 4, 2017, Ryan Taylor <<a href="mailto:ryta1203@gmail.com" target="_blank">ryta1203@gmail.com</a>> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div>Why you can't still expand it through MUL with a Custom lowering? Or am I missing something?</div><div><br></div></div></blockquote></span><div>Yes we can but problem occurs when we know that it is shift with constant value than if we return ISD::MUL with constant imm operand than LLVM will convert it to SHL again because the constant will be power of 2. Thus it creates loop.</div><div>So we may add target specific ISD node and lower it to mul instruction.</div><span class="m_2640177175628983546HOEnZb"><font color="#888888"><div><br></div><div>--VivekĀ </div></font></span><div class="m_2640177175628983546HOEnZb"><div class="m_2640177175628983546h5"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div>Thanks.</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Mar 3, 2017 at 12:21 PM, vivek pandya via llvm-dev <span dir="ltr"><<a>llvm-dev@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Hello LLVM Devs,<div><br></div><div>I am working on a target on which no SHL instruction is available. So wanted to expand it through MUL. But currently it is only possible to expand SHL for vector types.</div><div><br></div><div>One possible reason I can think is because LLVM tries to optimize MUL to SHL in certain cases and that can make compiler co in loop or may end up generating wrong code.</div><div><br></div><div>But I think SHL should be able to expanded to MUL and to prevent looping between MUL and SHL we can put a condition that only optimize MUL to SHL when SHL is not expanded operation. The similar logic can be applied to DIV and SRA.</div><div><br></div><div>If there is any other reasons for not doing this, kindly explain.</div><div><br></div><div>Sincerely,</div><div>Vivek</div></div>
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