<div dir="ltr"><div><br></div>Hi Krzysztof,<div><br></div><div>Thanks for reply, I checked that and it seems to be ok.</div><div>How ever I noticed that my build is have this problem on other architectures too. Only x86 is generating return instruction. Also epilogue loads are also missing. </div><div><br></div><div>I think I have done some thing wrong to some target independent code.</div><div><br></div><div>-Vivek<br><div class="gmail_extra"><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><br>
<br>
Hi Vivek,<br>
Make sure that you return the correct chain from LowerReturn.<br>
<br>
-Krzysztof<br>
<br>
<br>
On 2/22/2017 7:17 AM, vivek pandya via llvm-dev wrote:<br>
> Hello LLVM Devs,<br>
><br>
> I am trying to compile following simple program for an experimental backend<br>
><br>
> int main()<br>
> {<br>
> printf("Hello World \n");<br>
> return 0;<br>
> }<br>
><br>
> I have added code to lower return instruction in the backend however in<br>
> assembly I don't find return instruction generated.<br>
> In the debug-only=isel dump I can see that my target specific SDNode for<br>
> RET_FLAG is added but it gets removed during DAG<br>
> optimization phase.<br>
><br>
><br>
> Initial selection DAG: BB#0 'main:entry'<br>
> SelectionDAG has 18 nodes:<br>
> t5: i32 = GlobalAddress<i32 (i8*, ...)* @printf> 0<br>
> t0: ch = EntryToken<br>
> t4: ch = store<ST4[%retval]> t0, Constant:i32<0>,<br>
> FrameIndex:i32<0>, undef:i32<br>
> t8: ch,glue = callseq_start t4, TargetConstant:i32<0><br>
><br>
> t10: ch,glue = CopyToReg t8, Register:i32 %R5, GlobalAddress:i32<[14 x<br>
> i8]* @.str> 0<br>
> t12: ch,glue = DummyArchISD::CALL t10, TargetGlobalAddress:i32<i32<br>
> (i8*, ...)* @printf> 0, Register:i32 %R5, t10:1<br>
> t13: ch,glue = callseq_end t12, TargetConstant:i32<0>,<br>
> TargetConstant:i32<0>, t12:1<br>
> t15: i32,ch,glue = CopyFromReg t13, Register:i32 %R3, t13:1<br>
><br>
> t16: ch,glue = CopyToReg t15:1, Register:i32 %R3, Constant:i32<0><br>
><br>
> t17: ch = DummyArchISD::RET_FLAG t16, Register:i32 %R3, t16:1<br>
><br>
> t15: i32,ch,glue = CopyFromReg t13, Register:i32 %R3, t13:1<br>
><br>
><br>
> Optimized lowered selection DAG: BB#0 'main:entry'<br>
> SelectionDAG has 15 nodes:<br>
> t0: ch = EntryToken<br>
> t4: ch = store<ST4[%retval]> t0, Constant:i32<0>,<br>
> FrameIndex:i32<0>, undef:i32<br>
> t8: ch,glue = callseq_start t4, TargetConstant:i32<0><br>
><br>
> t10: ch,glue = CopyToReg t8, Register:i32 %R5, GlobalAddress:i32<[14 x<br>
> i8]* @.str> 0<br>
> t12: ch,glue = DummyArchISD::CALL t10, TargetGlobalAddress:i32<i32<br>
> (i8*, ...)* @printf> 0, Register:i32 %R5, t10:1<br>
> t13: ch,glue = callseq_end t12, TargetConstant:i32<0>,<br>
> TargetConstant:i32<0>, t12:1<br>
> t15: i32,ch,glue = CopyFromReg t13, Register:i32 %R3, t13:1<br>
><br>
><br>
><br>
> Can someone please guide me how to furhter debug this situation? Or any<br>
> hints.<br>
><br>
> Sincerely,<br>
> Vivek<br>
><br>
><br>
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<br></blockquote></div></div></div></div>