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Hi Alex,</div>
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I don’t know too much about recent MIPS, but have recently been doing something similar for the new ARM SVE architecture, so hopefully this will get you closer to what you need:</div>
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If you’re looking where I think you are (lib/Target/X86/X86InstrAVX512.td), ‘GatherNode’ is a template argument, not a definition.</div>
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It allows a PatFrag be passed into the avx512_gather multiclass definition.</div>
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Working backwards from here, the actual PatFrags passed into this are things like ‘mgatherv4i32’. These are patterns that match a MaskedGatherSDNode for a particular data type.</div>
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MaskedGatherSDNode is the generic SD node that represents a predicated gather, which in turn was generated from Intrinsic::masked_gather in the IR (in SelectionDAGBuilder::visitMaskedGather)</div>
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If your MIPS instruction has a predicate, you will need to create MIPS tablegen that matches MaskedGatherSDNode. If not, I guess you’ll need to create a new intrinsic that represents an unpredicted gather, and add appropriate uses of it during IR creation
(such as in LoopVectorize, where masked gathers are created today)</div>
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Hope that helps,</div>
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<div id="bloop_customfont" style="font-family:Helvetica,Arial;font-size:13px; color: rgba(0,0,0,1.0); margin: 0px; line-height: auto;">
Will Lovett</div>
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<p class="airmail_on">On 9 December 2016 at 01:52:48, Alex Susu via llvm-dev (<a href="mailto:llvm-dev@lists.llvm.org">llvm-dev@lists.llvm.org</a>) wrote:</p>
<blockquote type="cite" class="clean_bq"><span>
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<div></div>
<div>Hello.<br>
I read on page 4 of http://www.cs.fsu.edu/~whalley/cda5155/chap4.pdf that gather and
<br>
scatter operations exist for Mips, named LVI and SVI, respectively.<br>
<br>
Did anyone think of implementing in the LLVM Mips back end (part of the MSA vector
<br>
instructions) gather and scatter operations?<br>
If so, can you share with me the TableGen spec? (I tried to start from LD_DESC_BASE,
<br>
but it doesn't seem to be trivial. Also, LLVM seems to have implemented scatter/gather
<br>
instructions only for the x86 processor - there, they defined new SDNodes called <br>
GatherNode and ScatterNode.)<br>
<br>
Thank you,<br>
Alex<br>
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