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<p class="MsoNormal">Hi All,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">I’m writing to ask for the suggestion.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">I’m working on the AMDGPU project. I was recently analyzing our backend performance looking for optimization opportunities and found that LoadStore vectorizer is unable to handle simple case.<o:p></o:p></p>
<p class="MsoNormal">The deeper look revealed that the reason was in a i64 to i32 truncation.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">The OpenCL code looks like this:<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">__kernel void read_linear(__global float *input,__global float *output)<o:p></o:p></p>
<p class="MsoNormal">{<o:p></o:p></p>
<p class="MsoNormal"> float val = 0.0f;<o:p></o:p></p>
<p class="MsoNormal"> uint gid = get_global_id(0);<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"> val = val + input[gid + 0];<o:p></o:p></p>
<p class="MsoNormal"> val = val + input[gid + 1];<o:p></o:p></p>
<p class="MsoNormal"> val = val + input[gid + 2];<o:p></o:p></p>
<p class="MsoNormal"> val = val + input[gid + 3];<o:p></o:p></p>
<p class="MsoNormal"> val = val + input[gid + 4];<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">*** and so on… ***<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"> output[gid] = val;<o:p></o:p></p>
<p class="MsoNormal">}<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">I’d expect loads to be combined since they all have same base and offsets are constants and consecutively increasing.<o:p></o:p></p>
<p class="MsoNormal">That is exactly what happens if I change ‘uint’ to ‘ulong’ in the assignment: uint gid = get_global_id(0) => ulong gid = get_global_id(0) – loads are combined as expected.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">The reason is simple:<o:p></o:p></p>
<p class="MsoNormal">OpenCL get_global_id(uint) returns i64<o:p></o:p></p>
<p class="MsoNormal">The result is assigned to i32<o:p></o:p></p>
<p class="MsoNormal">Clang generates trunc i64 to i32 as AND with FFFFFFFF:<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">%call = tail call i64 @_Z13get_global_idj(i32 0) #2<o:p></o:p></p>
<p class="MsoNormal"> %idxprom = and i64 %call, 4294967295<o:p></o:p></p>
<p class="MsoNormal"> %arrayidx = getelementptr inbounds float, float addrspace(1)* %input, i64 %idxprom<o:p></o:p></p>
<p class="MsoNormal"> %0 = load float, float addrspace(1)* %arrayidx, align 4, !tbaa !7<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">So, LoadStoreVectorizer cannot combine with the next load:<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"> %add2 = add i64 %call, 1<o:p></o:p></p>
<p class="MsoNormal"> %idxprom3 = and i64 %add2, 4294967295<o:p></o:p></p>
<p class="MsoNormal"> %arrayidx4 = getelementptr inbounds float, float addrspace(1)* %input, i64 %idxprom3<o:p></o:p></p>
<p class="MsoNormal"> %1 = load float, float addrspace(1)* %arrayidx4, align 4, !tbaa !7<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Basically we have a case: C1 & ( A + C2 ) => C1 & A + C1 & C2 that is not always legal.<o:p></o:p></p>
<p class="MsoNormal">In our case that really is trunc(A+C) => trunc(A) + trunc(C) that is legal.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">NaryReassociate cannot handle this because it only considers ADD, MUL, GEP<o:p></o:p></p>
<p class="MsoNormal">Reassociate cannot handle this either just because it explicitly looks for “<span style="font-size:9.5pt">X&~X == 0, X|~X == -1.” or “Y ^ X^X -> Y”<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.5pt"><o:p> </o:p></span></p>
<p class="MsoNormal">We definitely should be able to optimize 0xFFFFFFFF & ( A + 1 ) to 0xFFFFFFFF & A + 1 given that bitwise AND with FFFFFFFF is a special case.<o:p></o:p></p>
<p class="MsoNormal">We maybe want be able to enhance bitwise operation processing to handle more common cases.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">I’d like to know your opinion on this topic.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Thanks in advance.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Alexander.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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