<div dir="ltr"><div class="markdown-here-wrapper" style=""><p style="margin:0px 0px 1.2em!important">Hello all,</p>
<p style="margin:0px 0px 1.2em!important">The AVR backend is now almost fully upstreamed. Krzysztof and Matt A have done an awesome job at reviewing all of the patches promptly and comprehensively.</p>
<p style="margin:0px 0px 1.2em!important">What has been merged:</p>
<ul style="margin:1.2em 0px;padding-left:2em">
<li style="margin:0.5em 0px">Almost all of the machine code backend (including the ELF object file writer)</li>
<li style="margin:0.5em 0px">The assembly parser</li>
<li style="margin:0.5em 0px">The assembly printer</li>
<li style="margin:0.5em 0px">The definitions for a few hundred different microcontroller definitions</li>
<li style="margin:0.5em 0px">Al of the register definitions</li>
<li style="margin:0.5em 0px">Most of the instruction selection code</li>
<li style="margin:0.5em 0px">The call frame lowering code</li>
<li style="margin:0.5em 0px">The CodeGen -> MachineCode glue</li>
<li style="margin:0.5em 0px">Definitions for all but two of the entire instruction set (we’re missing the load/store instructions that are for the AVR Tiny core only)</li>
<li style="margin:0.5em 0px">Calling convention definitions and lowering</li>
<li style="margin:0.5em 0px">Support for the <code style="font-size:0.85em;font-family:Consolas,Inconsolata,Courier,monospace;margin:0px 0.15em;padding:0px 0.3em;white-space:pre-wrap;border:1px solid rgb(234,234,234);background-color:rgb(248,248,248);border-radius:3px;display:inline">lo8(symbol)</code>, <code style="font-size:0.85em;font-family:Consolas,Inconsolata,Courier,monospace;margin:0px 0.15em;padding:0px 0.3em;white-space:pre-wrap;border:1px solid rgb(234,234,234);background-color:rgb(248,248,248);border-radius:3px;display:inline">hi8(symbol)</code> assembler macros and relocations</li>
</ul>
<p style="margin:0px 0px 1.2em!important">What is still waiting:</p>
<ul style="margin:1.2em 0px;padding-left:2em">
<li style="margin:0.5em 0px">The two core instruction selection classes (<a href="https://reviews.llvm.org/D25034">AVRISelLowering</a>, <a href="https://reviews.llvm.org/D25278">AVRISelDAGToDAG</a>)</li>
<li style="margin:0.5em 0px">The branch relaxation pass (which will be rewritten to use the generic relaxation pass before it is merged)</li>
<li style="margin:0.5em 0px">The pseudo instruction expansion pass (required for <em>most</em> programs)</li>
<li style="margin:0.5em 0px">The disassembler (currently only half written)</li>
<li style="margin:0.5em 0px">A fix to the greedy register allocator to fix an assertion error for very small register classes (<a href="https://reviews.llvm.org/D25070">D25070</a>)</li>
</ul>
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