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</o:shapelayout></xml><![endif]--></head><body lang=EN-IE link="#0563C1" vlink="#954F72"><div class=WordSection1><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'>Hi LLVM-Dev,<o:p></o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'><o:p> </o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'>I am trying to implement support for emulated FP64 on our target.  Many operations work fine, invoking the appropriate helper function in ‘</span><span lang=EN-GB style='font-size:12.0pt;font-family:"Courier New"'>compiler-rt</span><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'>’.  But we don’t have a specific register class for FP64 and LLVM usually selects a pair of 32-bit integers, which is fine.  The problem is that it doesn’t “always” select a pair of 32-bit integers, and then I get an assertion in ‘</span><span lang=EN-GB style='font-size:12.0pt;font-family:"Courier New"'>TargetRegisterInfo::getMinimalPhysRegClass</span><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'>’ that says “Couldn’t find the register class”.<o:p></o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'><o:p> </o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'>The funny thing is that something like ‘</span><span lang=EN-GB style='font-size:12.0pt;font-family:"Courier New"'>a = b * c;</span><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'>’ works perfectly, but the much simple ‘</span><span lang=EN-GB style='font-size:12.0pt;font-family:"Courier New"'>a = b;</span><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'>’ causes this assertion.<o:p></o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'><o:p> </o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'>We have not used ‘</span><span lang=EN-GB style='font-size:12.0pt;font-family:"Courier New"'>setOperationAction</span><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'>’ for any of the FP64 operations, nor have we created a special register class for them either, in the expectation that it would just reduce to the underlying integers and ‘</span><span lang=EN-GB style='font-size:12.0pt;font-family:"Courier New"'>compiler-rt</span><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'>’ calls.<o:p></o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'><o:p> </o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'>I’m a bit stumped, so does anyone have any advice about how I should describe our target so that it supports emulated FP64 using either a pair of 32-bit integers or a single 64-bit register as the underlying implementation type?<o:p></o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'><o:p> </o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'>Thanks,<o:p></o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'><o:p> </o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'>            MartinO - Movidius<o:p></o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:12.0pt;font-family:"Book Antiqua",serif'><o:p> </o:p></span></p></div></body></html>