<div dir="ltr">Hi David,<div><br></div><div>Assuming I understood the question correctly - Intel doesn't specify which FMA instruction is going to be used, but it does specify what it expects the result to be. </div><div><br></div><div>E.g. for</div><div>__m128 _mm_fmadd_ss (__m128 a, __m128 b, __m128 c) </div><div>the specified semantics are:</div><div><br></div>dst[31:0] := (a[31:0] * b[31:0]) + c[31:0]<div>dst[127:32] := a[127:32]</div><div>dst[MAX:128] := 0</div><div><br></div><div>The user is allowed to rely on the upper bits of the result being the upper bits of a, and the compiler is required choose an appropriate instruction form that will make this happen.</div><div><br></div><div>Thanks,</div><div> Michael</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Sep 12, 2016 at 10:24 AM, via llvm-dev <span dir="ltr"><<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">I noticed that the operand commuting code in X86InstrInfo.cpp treats<br>
scalar FMA intrinsics specially. It prevents operand commuting on these<br>
scalar instructions because the scalar FMA instructions preserve the<br>
upper bits of the vector. Presumably, the restrictions are there<br>
because commuting operands potentially changes the result upper bits.<br>
<br>
However, AFAIK the Intel and GNU FMA intrinsics don't actually specify<br>
which FMA (213, 132, 231) is going to be used and so the user can't rely<br>
on knowing which operand is tied to the destination. Thus the user<br>
can't rely on knowing what the upper bits will be.<br>
<br>
Is there some other reason these scalar FMA commuting restrictions are<br>
in place?<br>
<br>
Thanks!<br>
<br>
-David<br>
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