# After Two-Address instruction pass: # Machine code for function main: Post SSA Frame Objects: fi#0: size=4, align=4, at location [SP] fi#1: size=4, align=4, at location [SP] fi#2: size=4, align=4, at location [SP] BB#0: derived from LLVM BB %0 %vreg0 = LOADii %vreg0; GRRegs:%vreg0 %vreg1 = MOVLOi16 0; GRRegs:%vreg1 STR %vreg1, %vreg0; mem:ST4[%1] GRRegs:%vreg1,%vreg0 %vreg2 = LOADii %vreg2; GRRegs:%vreg2 %vreg3 = MOVLOi16 5; GRRegs:%vreg3 STR %vreg3, %vreg2; mem:ST4[%a] GRRegs:%vreg3,%vreg2 %vreg4 = LOADii %vreg4; GRRegs:%vreg4 %vreg5 = MOVLOi16 3; GRRegs:%vreg5 STR %vreg5, %vreg4; mem:ST4[%b] GRRegs:%vreg5,%vreg4 %R0 = COPY %vreg1; GRRegs:%vreg1 RET %R0, %LR # End machine code for function main. # Machine code for function main: Post SSA Frame Objects: fi#0: size=4, align=4, at location [SP] fi#1: size=4, align=4, at location [SP] fi#2: size=4, align=4, at location [SP] BB#0: derived from LLVM BB %0 %vreg0 = LOADii %vreg0; GRRegs:%vreg0 %vreg1 = MOVLOi16 0; GRRegs:%vreg1 STR %vreg1, %vreg0; mem:ST4[%1] GRRegs:%vreg1,%vreg0 %vreg2 = LOADii %vreg2; GRRegs:%vreg2 %vreg3 = MOVLOi16 5; GRRegs:%vreg3 STR %vreg3, %vreg2; mem:ST4[%a] GRRegs:%vreg3,%vreg2 %vreg4 = LOADii %vreg4; GRRegs:%vreg4 %vreg5 = MOVLOi16 3; GRRegs:%vreg5 STR %vreg5, %vreg4; mem:ST4[%b] GRRegs:%vreg5,%vreg4 %R0 = COPY %vreg1; GRRegs:%vreg1 RET %R0, %LR # End machine code for function main. *** Bad machine code: MBB exits via unconditional fall-through but ends with a barrier instruction! *** - function: main - basic block: BB#0 (0xb06c4fc) LLVM ERROR: Found 1 machine code errors.