<div dir="ltr"><div><div><div><div><div>I'm not an expert on this at all and there isn't enough information shown to see how the "Good" back end performs the BUILD_VECTOR operation with a constant vector, but it is clear that your back end does that with a Constant Pool load. Furthermore, your back end probably does not specify a matcher in the target description file for the respective load.<br><br></div>As far as debugging is concerned - you can find exactly where the matching fails by opening $LLVM_BUILD/lib/<Target>/<Tgt>GenDAGISel.inc and finding the indices listed above (268, 277, etc.).<br><br></div>So I think that if you don't want BUILD_VECTOR for MVT::v8i64 with constant elements to be legalized as a constant pool load, you should not have the following line in your TargetLowering instance:<br><span style="font-family:monospace,monospace">setOperationAction(ISD::BUILD_VECTOR, MVT::v8i64, Expand)</span><br></div><br><br></div>At least I think that is a rough description of some of the issues causing this.<br><br></div>N<br></div><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Aug 2, 2016 at 6:00 PM, Alex Susu via llvm-dev <span dir="ltr"><<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> Hello.<br>
I'm having problems at instruction selection with my back end with the following basic-block due to a vector add with immediate constant vector (obtained by vectorizing a simple C program doing vector sum map):<br>
<a href="http://vector.ph" rel="noreferrer" target="_blank">vector.ph</a>: ; preds = %vector.memcheck50<br>
%.splatinsert = insertelement <8 x i64> undef, i64 %i.07.unr, i32 0<br>
%.splat = shufflevector <8 x i64> %.splatinsert, <8 x i64> undef, <8 x i32> zeroinitializer<br>
%induction = add <8 x i64> %.splat, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7><br>
%.splatinsert56 = insertelement <8 x i64> undef, i64 %xtraiter, i32 0<br>
%.splat57 = shufflevector <8 x i64> %.splatinsert56, <8 x i64> undef, <8 x i32> zeroinitializer<br>
%induction58 = add <8 x i64> %.splat57, <i64 0, i64 -1, i64 -2, i64 -3, i64 -4, i64 -5, i64 -6, i64 -7><br>
br label %vector.body25<br>
<br>
The exact problem reported is:<br>
Selecting: t51: v8i64,ch = load<LD64[ConstantPool]> t0, ConstantPool:i64<<8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>> 0, undef:i64<br>
ISEL: Starting pattern match on root node: t51: v8i64,ch = load<LD64[ConstantPool]> t0, ConstantPool:i64<<8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>> 0, undef:i64<br>
Initial Opcode index to 268<br>
Match failed at index 277<br>
Continuing at 396<br>
Match failed at index 398<br>
Continuing at 422<br>
LLVM ERROR: Cannot select: t51: v8i64,ch = load<LD64[ConstantPool]> t0, ConstantPool:i64<<8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>> 0, undef:i64<br>
t50: i64 = ConstantPool<<8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>> 0<br>
t48: i64 = undef<br>
In function: foo<br>
<br>
The reason is that for the basic-block my back end generates the following Selection DAG:<br>
(From 201_LoopVectorize/25_GOOD_map/NEW/6/1/NEW/STDerr3_wo_getSetCCResultType)<br>
Initial selection DAG: BB#15 'foo:<a href="http://vector.ph" rel="noreferrer" target="_blank">vector.ph</a>'<br>
SelectionDAG has 41 nodes:<br>
t0: ch = EntryToken<br>
t4: i32 = Constant<0><br>
t3: i64,ch = CopyFromReg t0, Register:i64 %vreg12<br>
t6: v8i64 = insert_vector_elt undef:v8i64, t3, Constant:i64<0><br>
t7: v8i64 = vector_shuffle<0,0,0,0,0,0,0,0> t6, undef:v8i64<br>
t15: v8i64 = BUILD_VECTOR Constant:i64<0>, Constant:i64<1>, Constant:i64<2>, Constant:i64<3>, Constant:i64<4>, Constant:i64<5>, Constant:i64<6>, Constant:i64<7><br>
t16: v8i64 = add t7, t15<br>
t18: ch = CopyToReg t0, Register:v8i64 %vreg16, t16<br>
t20: i64,ch = CopyFromReg t0, Register:i64 %vreg5<br>
t22: i64 = AssertSext t20, ValueType:ch:i8<br>
t23: v8i64 = insert_vector_elt undef:v8i64, t22, Constant:i64<0><br>
t24: v8i64 = vector_shuffle<0,0,0,0,0,0,0,0> t23, undef:v8i64<br>
t32: v8i64 = BUILD_VECTOR Constant:i64<0>, Constant:i64<-1>, Constant:i64<-2>, Constant:i64<-3>, Constant:i64<-4>, Constant:i64<-5>, Constant:i64<-6>, Constant:i64<-7><br>
t33: v8i64 = add t24, t32<br>
t35: ch = CopyToReg t0, Register:v8i64 %vreg17, t33<br>
t37: ch = CopyToReg t0, Register:i64 %vreg117, Constant:i64<0><br>
t39: ch = TokenFactor t18, t35, t37<br>
t40: ch = br t39, BasicBlock:ch<vector.body25 0x1d07660><br>
<br>
However, when using the mips64 back end (subtarget) we get this correct selection DAG:<br>
(From 201_LoopVectorize/25_GOOD_map/NEW/6/1/NEW/Mips64/STDerr_llc_mips64)<br>
Initial selection DAG: BB#15 'foo:<a href="http://vector.ph" rel="noreferrer" target="_blank">vector.ph</a>'<br>
SelectionDAG has 87 nodes:<br>
t0: ch = EntryToken<br>
t4: i32 = Constant<0><br>
t3: i64,ch = CopyFromReg t0, Register:i64 %vreg12<br>
t6: v8i64 = insert_vector_elt undef:v8i64, t3, Constant:i64<0><br>
t7: v8i64 = vector_shuffle<0,0,0,0,0,0,0,0> t6, undef:v8i64<br>
t15: v8i64 = BUILD_VECTOR Constant:i64<0>, Constant:i64<1>, Constant:i64<2>, Constant:i64<3>, Constant:i64<4>, Constant:i64<5>, Constant:i64<6>, Constant:i64<7><br>
t16: v8i64 = add t7, t15<br>
t43: i64,ch = CopyFromReg t0, Register:i64 %vreg5<br>
t45: i64 = AssertSext t43, ValueType:ch:i8<br>
t46: v8i64 = insert_vector_elt undef:v8i64, t45, Constant:i64<0><br>
t47: v8i64 = vector_shuffle<0,0,0,0,0,0,0,0> t46, undef:v8i64<br>
t55: v8i64 = BUILD_VECTOR Constant:i64<0>, Constant:i64<-1>, Constant:i64<-2>, Constant:i64<-3>, Constant:i64<-4>, Constant:i64<-5>, Constant:i64<-6>, Constant:i64<-7><br>
t56: v8i64 = add t47, t55<br>
t17: i64 = extract_vector_elt t16, Constant:i64<0><br>
t26: ch = CopyToReg t0, Register:i64 %vreg16, t17<br>
t18: i64 = extract_vector_elt t16, Constant:i64<1><br>
t28: ch = CopyToReg t0, Register:i64 %vreg17, t18<br>
t19: i64 = extract_vector_elt t16, Constant:i64<2><br>
t30: ch = CopyToReg t0, Register:i64 %vreg18, t19<br>
t20: i64 = extract_vector_elt t16, Constant:i64<3><br>
t32: ch = CopyToReg t0, Register:i64 %vreg19, t20<br>
t21: i64 = extract_vector_elt t16, Constant:i64<4><br>
t34: ch = CopyToReg t0, Register:i64 %vreg20, t21<br>
t22: i64 = extract_vector_elt t16, Constant:i64<5><br>
t36: ch = CopyToReg t0, Register:i64 %vreg21, t22<br>
t23: i64 = extract_vector_elt t16, Constant:i64<6><br>
t38: ch = CopyToReg t0, Register:i64 %vreg22, t23<br>
t24: i64 = extract_vector_elt t16, Constant:i64<7><br>
t40: ch = CopyToReg t0, Register:i64 %vreg23, t24<br>
t41: ch = TokenFactor t26, t28, t30, t32, t34, t36, t38, t40<br>
t57: i64 = extract_vector_elt t56, Constant:i64<0><br>
t66: ch = CopyToReg t0, Register:i64 %vreg24, t57<br>
t58: i64 = extract_vector_elt t56, Constant:i64<1><br>
t68: ch = CopyToReg t0, Register:i64 %vreg25, t58<br>
t59: i64 = extract_vector_elt t56, Constant:i64<2><br>
t70: ch = CopyToReg t0, Register:i64 %vreg26, t59<br>
t60: i64 = extract_vector_elt t56, Constant:i64<3><br>
t72: ch = CopyToReg t0, Register:i64 %vreg27, t60<br>
t61: i64 = extract_vector_elt t56, Constant:i64<4><br>
t74: ch = CopyToReg t0, Register:i64 %vreg28, t61<br>
t62: i64 = extract_vector_elt t56, Constant:i64<5><br>
t76: ch = CopyToReg t0, Register:i64 %vreg29, t62<br>
t63: i64 = extract_vector_elt t56, Constant:i64<6><br>
t78: ch = CopyToReg t0, Register:i64 %vreg30, t63<br>
t64: i64 = extract_vector_elt t56, Constant:i64<7><br>
t80: ch = CopyToReg t0, Register:i64 %vreg31, t64<br>
t81: ch = TokenFactor t66, t68, t70, t72, t74, t76, t78, t80<br>
t83: ch = CopyToReg t0, Register:i64 %vreg209, Constant:i64<0><br>
t85: ch = TokenFactor t41, t81, t83<br>
t86: ch = br t85, BasicBlock:ch<vector.body25 0x1bd35f0><br>
<br>
I am curious what is wrong - I've tried to match the Mips' back end: I have put most of the vector splat instructions and the vextract and INSERT_D_DESC instruction, etc .<br>
I also don't get enough DEBUG information to understand where exactly the problem comes from (probably I missed some TableGen record).<br>
<br>
Please let me know if you have any idea.<br>
<br>
Thank you very much,<br>
Alex<br>
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</blockquote></div><br></div>