<html><body><p><font face="Courier New">Sure, I've attached it to the bug report. Direct link is here: </font><a href="https://llvm.org/bugs/attachment.cgi?id=16840"><font face="Courier New">https://llvm.org/bugs/attachment.cgi?id=16840</font></a><br><br><font face="Courier New">- Elliot</font><br><br><tt>"llvm-dev" <llvm-dev-bounces@lists.llvm.org> wrote on 2016/07/29 03:46:41 PM:<br><br>> From: Krzysztof Parzyszek via llvm-dev <llvm-dev@lists.llvm.org></tt><br><tt>> To: llvm-dev@lists.llvm.org</tt><br><tt>> Date: 2016/07/29 03:46 PM</tt><br><tt>> Subject: Re: [llvm-dev] Understanding failed assert in reg pressure <br>> reduction list scheduler</tt><br><tt>> Sent by: "llvm-dev" <llvm-dev-bounces@lists.llvm.org></tt><br><tt>> <br>> Could you post the .ll file with the testcase?<br>> <br>> -Krzysztof<br>> <br>> <br>> On 7/29/2016 2:38 PM, Elliot Colp via llvm-dev wrote:<br>> > Hi all,<br>> ><br>> > I'm currently investigating a bug which is causing an assert to fail in<br>> > lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp. See<br>> > <a href="https://llvm.org/bugs/show_bug.cgi?id=28753">https://llvm.org/bugs/show_bug.cgi?id=28753</a> for repro information.<br>> ><br>> > To my knowledge, this problem only occurs with the SystemZ target. I'm<br>> > trying to determine whether the issue is the result of an edge case in<br>> > the scheduling code itself, or if it's a SystemZ target problem.<br>> > However, I'm unfamiliar with the scheduling code, so I'm not entirely<br>> > certain what the correct behaviour is.<br>> ><br>> > My rough understanding of the problem is that, while attempting to pick<br>> > a node to schedule, we're running out of candidates (in<br>> > ScheduleDAGRRList::PickNodeToScheduleBottomUp). This causes us to try to<br>> > copy a node, and in the process, we call getPhysicalRegisterVT. This<br>> > function asserts that the MCInstrDesc associated with the node will have<br>> > ImplicitDefs, but in our case, it does not.<br>> ><br>> > In short: does this seem to be a problem of missing information in the<br>> > MCInstrDesc, or should we not have arrived at that assert in the first<br>> > place?<br>> ><br>> > Thanks,<br>> ><br>> > - Elliot<br>> ><br>> ><br>> ><br>> > _______________________________________________<br>> > LLVM Developers mailing list<br>> > llvm-dev@lists.llvm.org<br>> > <a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev</a><br>> ><br>> <br>> <br>> -- <br>> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, <br>> hosted by The Linux Foundation<br>> _______________________________________________<br>> LLVM Developers mailing list<br>> llvm-dev@lists.llvm.org<br>> <a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev</a><br></tt><BR>
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