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</o:shapelayout></xml><![endif]--></head><body lang=EN-IE link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'>This looks promising Simon. And there are aspects of the ‘</span><span style='font-family:"Courier New";color:black;mso-fareast-language:EN-US'>InstAlias</span><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'>’ class that may be useful too. Also, your reference to its use in the MIPS implementation will help me to learn by example.<o:p></o:p></span></p><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'>Thanks very much for your insights,<o:p></o:p></span></p><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'> MartinO<o:p></o:p></span></p><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:#943634;mso-fareast-language:EN-US'><o:p> </o:p></span></p><div><div style='border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0cm 0cm 0cm'><p class=MsoNormal><b><span lang=EN-US style='font-size:11.0pt;font-family:"Calibri",sans-serif'>From:</span></b><span lang=EN-US style='font-size:11.0pt;font-family:"Calibri",sans-serif'> Simon Dardis [mailto:Simon.Dardis@imgtec.com] <br><b>Sent:</b> 08 July 2016 13:31<br><b>To:</b> Martin.ORiordan@Movidius.com<br><b>Cc:</b> llvm-dev@lists.llvm.org<br><b>Subject:</b> RE: [llvm-dev] Dynamic selection of assembly mnemonic strings<o:p></o:p></span></p></div></div><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal><span lang=EN-GB style='font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'>One possible approach is to use the instruction mapping infrastructure: <a href="http://llvm.org/docs/HowToUseInstrMappings.html">http://llvm.org/docs/HowToUseInstrMappings.html</a><o:p></o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'>This provides a simple 1:1 mapping between the same instruction in two ISAs. For MIPS we use this to map the base MIPS ISA<o:p></o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'>to the microMIPS ISA, and allows us to write the bulk of our .cpp files without multiple switches on ISA.<o:p></o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'>Thanks,<o:p></o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'>Simon<o:p></o:p></span></p><p class=MsoNormal><span lang=EN-GB style='font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'><o:p> </o:p></span></p><div style='border:none;border-left:solid blue 1.5pt;padding:0cm 0cm 0cm 4.0pt'><div><div style='border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0cm 0cm 0cm'><p class=MsoNormal><b><span lang=EN-US style='font-size:10.0pt;font-family:"Tahoma",sans-serif'>From:</span></b><span lang=EN-US style='font-size:10.0pt;font-family:"Tahoma",sans-serif'> llvm-dev [<a href="mailto:llvm-dev-bounces@lists.llvm.org">mailto:llvm-dev-bounces@lists.llvm.org</a>] <b>On Behalf Of </b>Martin J. O'Riordan via llvm-dev<br><b>Sent:</b> 08 July 2016 12:58<br><b>To:</b> 'Bruce Hoult'<br><b>Cc:</b> 'LLVM Developers'<br><b>Subject:</b> Re: [llvm-dev] Dynamic selection of assembly mnemonic strings<o:p></o:p></span></p></div></div><p class=MsoNormal><span lang=EN-GB><o:p> </o:p></span></p><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'>Thanks for the quick answer Bruce.<o:p></o:p></span></p><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'>So far as I can tell (from a quick read), this is really for integrated assemblers/disassemblers - but we use an external assembler. When invoking clang we would provide ‘</span><span style='font-family:"Courier New";color:black;mso-fareast-language:EN-US'>-mcpu=chip_v1</span><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'>’ or ‘</span><span style='font-family:"Courier New";color:black;mso-fareast-language:EN-US'>-mcpu=chip_v2</span><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'>’, and the mnemonic ‘</span><span style='font-family:"Courier New";color:black;mso-fareast-language:EN-US'>LD32</span><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'>’ is only valid when compiling for ‘</span><span style='font-family:"Courier New";color:black;mso-fareast-language:EN-US'>chip_v1</span><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'>’, while ‘</span><span style='font-family:"Courier New";color:black;mso-fareast-language:EN-US'>LD.32</span><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'>’ is only valid when compiling for ‘</span><span style='font-family:"Courier New";color:black;mso-fareast-language:EN-US'>chip_v2</span><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'>’. But I will study the mnemonic aliasing carefully to see if it does provide what I need.<o:p></o:p></span></p><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'>All the best,<o:p></o:p></span></p><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:black;mso-fareast-language:EN-US'> MartinO<o:p></o:p></span></p><p class=MsoNormal><span style='font-family:"Book Antiqua",serif;color:#943634;mso-fareast-language:EN-US'><o:p> </o:p></span></p><p class=MsoNormal><b><span lang=EN-US style='font-size:11.0pt;font-family:"Calibri",sans-serif'>From:</span></b><span lang=EN-US style='font-size:11.0pt;font-family:"Calibri",sans-serif'> <a href="mailto:bruce.hoult@gmail.com">bruce.hoult@gmail.com</a> [<a href="mailto:bruce.hoult@gmail.com">mailto:bruce.hoult@gmail.com</a>] <b>On Behalf Of </b>Bruce Hoult<br><b>Sent:</b> 08 July 2016 12:32<br><b>To:</b> Martin J. O'Riordan <<a href="mailto:Martin.ORiordan@movidius.com">Martin.ORiordan@movidius.com</a>><br><b>Cc:</b> LLVM Developers <<a href="mailto:llvm-dev@lists.llvm.org">llvm-dev@lists.llvm.org</a>><br><b>Subject:</b> Re: [llvm-dev] Dynamic selection of assembly mnemonic strings<o:p></o:p></span></p><p class=MsoNormal><o:p> </o:p></p><div><p class=MsoNormal>Do instruction aliases do the job?<o:p></o:p></p><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal><a href="http://llvm.org/docs/CodeGenerator.html#instruction-alias-processing">http://llvm.org/docs/CodeGenerator.html#instruction-alias-processing</a><o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>Is it ok to have the same source file use LD32 in one instruction but LD.32 in the next one, or do you want different modes?<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div></div><div><p class=MsoNormal><o:p> </o:p></p><div><p class=MsoNormal>On Fri, Jul 8, 2016 at 2:24 PM, Martin J. O'Riordan via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>> wrote:<o:p></o:p></p><blockquote style='border:none;border-left:solid #CCCCCC 1.0pt;padding:0cm 0cm 0cm 6.0pt;margin-left:4.8pt;margin-top:5.0pt;margin-right:0cm;margin-bottom:5.0pt'><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'>Hi LLVM Dev,</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'> </span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'>I have an old problem that I’ve wanted to clean-up for some time. Our chip has gone through a number of iterations in the past few years, but with each revision there have been changes to some of the mnemonics for instructions. These are mostly very simple, for example we had a 32-bit load from memory instruction named ‘</span><span style='font-family:"Courier New"'>LD32</span><span style='font-family:"Book Antiqua",serif'>’ in one version of the chip, but for a later version this was changed to ‘</span><span style='font-family:"Courier New"'>LD.32</span><span style='font-family:"Book Antiqua",serif'>’.</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'> </span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'>The semantics and schedule remained the same, but in the TD file I had to introduce two ‘</span><span style='font-family:"Courier New"'>def</span><span style='font-family:"Book Antiqua",serif'>’s for this (actually, I abstract a bit more and use a ‘</span><span style='font-family:"Courier New"'>defm</span><span style='font-family:"Book Antiqua",serif'>’):</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'> </span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:36.0pt'><span style='font-family:"Courier New"'>def LD32_v1 : Instr<... “LD32” ...>, Requires<[isV1]>;</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:36.0pt'><span style='font-family:"Courier New"'>def LD32_v2 : Instr<... “LD.32” ...>, Requires<[isV2]>;</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'> </span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'>This all works fine, but there is a large number of them which makes maintenance difficult. This also adds to the burden of selection when using ‘</span><span style='font-family:"Courier New"'>BuildMI</span><span style='font-family:"Book Antiqua",serif'>’ in the C++ code, as I have to do things like:</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'> </span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:36.0pt'><span style='font-family:"Courier New"'>if (isV1())</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:36.0pt'><span style='font-family:"Courier New"'> BuildMI(..., TII->get(SHAVE::LD32_v1)</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:36.0pt'><span style='font-family:"Courier New"'>else if (isV2())</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:36.0pt'><span style='font-family:"Courier New"'> BuildMI(..., TII->get(SHAVE::LD32_v2)</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'> </span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'>What I would like, is for some mechanism that can substitute the version specific mnemonic dynamically (perhaps using a lookup table), and I could reduce the above to just:</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'> </span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:36.0pt'><span style='font-family:"Courier New"'>def LD32 : Instr<... “??MetaMnemonic??” ...>;</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'>and:</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:36.0pt'><span style='font-family:"Courier New"'>BuildMI(..., TII->get(SHAVE::LD32)</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'> </span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'>Does anyone know how this can be achieved without resort to placing some Meta-Mnemonic for ‘</span><span style='font-family:"Courier New"'>??MetaMnemonic??</span><span style='font-family:"Book Antiqua",serif'>’ and replacing this with the version specific value during AsmPrinting?</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'> </span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'>Some instructions have more elaborate substitutions, but the general principle is the same and there are a large number of instructions that are affected which makes the TD files very large, and the conditional ‘</span><span style='font-family:"Courier New"'>BuildMI</span><span style='font-family:"Book Antiqua",serif'>’ code overcomplicated.</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'> </span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'>Thanks,</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'> </span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'> MartinO</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Book Antiqua",serif'> </span><o:p></o:p></p></div></div><p class=MsoNormal style='margin-bottom:12.0pt'><br>_______________________________________________<br>LLVM Developers mailing list<br><a href="mailto:llvm-dev@lists.llvm.org">llvm-dev@lists.llvm.org</a><br><a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev</a><o:p></o:p></p></blockquote></div><p class=MsoNormal><o:p> </o:p></p></div></div></div></body></html>