<div dir="ltr"><div>Hi Krzysztof,</div><div><br></div><div>It actually shows a load at 0, I should also mention that I am using the msp430 as a template as I iteratively modify it. It may not be the best template to move to a standard 32 bit load / store RISC type architecture. :/ The msp430 can have memory locations as the source input on instructions. </div><div><br></div><div>Thanks for your time,</div><div><br>Jeff</div><div><br></div><div>// InstrInfo.td</div><div><br></div><div><div>def MOV32rm : I32<0x0,</div><div> (outs GR32:$dst), (ins memsrc:$src),</div><div> "mov.w\t{$src, $dst}",</div><div> [(set GR32:$dst, (load addr:$src))]>;</div><div>}</div></div><div><br></div><div>//<span style="font-size:12.8px">GenDAGISel.inc</span></div><div><span style="font-size:12.8px"><br></span></div><div> #define TARGET_VAL(X) X & 255, unsigned(X) >> 8</div><div> static const unsigned char MatcherTable[] = {</div><div>/*0*/ OPC_SwitchOpcode /*27 cases */, 22, TARGET_VAL(ISD::LOAD),// ->26</div><div>/*4*/ OPC_RecordMemRef,</div><div>/*5*/ OPC_RecordNode, // #0 = 'ld' chained node</div><div>/*6*/ OPC_RecordChild1, // #1 = $src</div><div>/*7*/ OPC_CheckPredicate, 0, // Predicate_unindexedload</div><div>/*9*/ OPC_CheckPredicate, 1, // Predicate_load</div><div>/*11*/ OPC_CheckType, MVT::i32,</div><div>/*13*/ OPC_CheckComplexPat, /*CP*/0, /*#*/1, // SelectAddr:$src #2 #3</div><div>/*16*/ OPC_EmitMergeInputChains1_0,</div><div>/*17*/ OPC_MorphNodeTo, TARGET_VAL(JEFFARCH::MOV32rm), 0|OPFL_Chain|OPFL_MemRefs,</div><div> 1/*#VTs*/, MVT::i32, 2/*#Ops*/, 2, 3, </div><div><br></div><div><br></div><div><br></div></div><div class="gmail_extra"><br><div class="gmail_quote">On Wed, Jun 22, 2016 at 2:23 PM, Krzysztof Parzyszek <span dir="ltr"><<a href="mailto:kparzysz@codeaurora.org" target="_blank">kparzysz@codeaurora.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Here's the beginning of the HexagonGenDAGISel.inc file (without the comment):<br>
<br>
<br>
// The main instruction selector code.<br>
SDNode *SelectCode(SDNode *N) {<br>
// Some target values are emitted as 2 bytes, TARGET_VAL handles<br>
// this.<br>
#define TARGET_VAL(X) X & 255, unsigned(X) >> 8<br>
static const unsigned char MatcherTable[] = {<br>
/*0*/ OPC_SwitchOpcode /*95 cases */, 16|128,95/*12176*/, TARGET_VAL(ISD::STORE),// ->12181<br>
/*5*/ OPC_RecordMemRef,<br>
/*6*/ OPC_RecordNode, // #0 = 'st' chained node<br>
/*7*/ OPC_Scope, 75|128,64/*8267*/, /*->8277*/ // 4 children in Scope<br>
/*10*/ OPC_MoveChild1,<br>
<br>
You should have the corresponding file for yout target in your build directory (it's an automatically generated file).<br>
<br>
The /*0*/ is the first step that the selector takes in your case, and it's the step where it fails ("match failed at index 0"). What's at this index in your file? What patterns for stores do you have in your .td files?<br>
<br>
-Krzysztof<div><div class="h5"><br>
<br>
<br>
<br>
<br>
On 6/22/2016 1:25 PM, Jeff E wrote:<br>
</div></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div class="h5">
Thanks Anton and Krzysztof!<br>
<br>
<br>
<br>
Here is the dump using the -debug flag. At this point I am not making<br>
much sense of this, would it be too much to ask if one of you could walk<br>
me through one of these lines?<br>
<br>
One thing that I didn't point out is that I never defined any separate<br>
floating point registers, not sure if this will pose any issue?<br>
<br>
Thanks again for your time!<br>
<br>
Jeff<br>
<br>
jeff@ubuntu:~/code$ llc -debug-only=isel dft_gf_msp.ll<br>
<br>
=== main<br>
Initial selection DAG: BB#0 'main:entry'<br>
SelectionDAG has 18 nodes:<br>
t0: ch = EntryToken<br>
t4: ch = store<ST4[%retval]> t0, Constant:i32<0>,<br>
FrameIndex:i32<0>, undef:i32<br>
t7: ch = store<ST4[%sz]> t4, Constant:i32<256>,<br>
FrameIndex:i32<2>, undef:i32<br>
t10: ch = store<ST4[%dir]> t7, ConstantFP:f32<-1.000000e+00>,<br>
FrameIndex:i32<3>, undef:i32<br>
t12: ch = store<ST4[%m]> t10, Constant:i32<0>, FrameIndex:i32<19>,<br>
undef:i32<br>
t13: i32,ch = load<LD4[%sz]> t12, FrameIndex:i32<2>, undef:i32<br>
t15: ch = store<ST4[%j]> t13:1, t13, FrameIndex:i32<16>, undef:i32<br>
t17: ch = store<ST4[%le]> t15, t13, FrameIndex:i32<14>, undef:i32<br>
<br>
<br>
Optimized lowered selection DAG: BB#0 'main:entry'<br>
SelectionDAG has 18 nodes:<br>
t0: ch = EntryToken<br>
t4: ch = store<ST4[%retval]> t0, Constant:i32<0>,<br>
FrameIndex:i32<0>, undef:i32<br>
t7: ch = store<ST4[%sz]> t4, Constant:i32<256>,<br>
FrameIndex:i32<2>, undef:i32<br>
t19: ch = store<ST4[%dir]> t7, Constant:i32<-1082130432>,<br>
FrameIndex:i32<3>, undef:i32<br>
t12: ch = store<ST4[%m]> t19, Constant:i32<0>, FrameIndex:i32<19>,<br>
undef:i32<br>
t13: i32,ch = load<LD4[%sz]> t12, FrameIndex:i32<2>, undef:i32<br>
t15: ch = store<ST4[%j]> t13:1, t13, FrameIndex:i32<16>, undef:i32<br>
t17: ch = store<ST4[%le]> t15, t13, FrameIndex:i32<14>, undef:i32<br>
<br>
<br>
Type-legalized selection DAG: BB#0 'main:entry'<br>
SelectionDAG has 18 nodes:<br>
t0: ch = EntryToken<br>
t4: ch = store<ST4[%retval]> t0, Constant:i32<0>,<br>
FrameIndex:i32<0>, undef:i32<br>
t7: ch = store<ST4[%sz]> t4, Constant:i32<256>,<br>
FrameIndex:i32<2>, undef:i32<br>
t19: ch = store<ST4[%dir]> t7, Constant:i32<-1082130432>,<br>
FrameIndex:i32<3>, undef:i32<br>
t12: ch = store<ST4[%m]> t19, Constant:i32<0>, FrameIndex:i32<19>,<br>
undef:i32<br>
t13: i32,ch = load<LD4[%sz]> t12, FrameIndex:i32<2>, undef:i32<br>
t15: ch = store<ST4[%j]> t13:1, t13, FrameIndex:i32<16>, undef:i32<br>
t17: ch = store<ST4[%le]> t15, t13, FrameIndex:i32<14>, undef:i32<br>
<br>
<br>
Legalized selection DAG: BB#0 'main:entry'<br>
SelectionDAG has 18 nodes:<br>
t0: ch = EntryToken<br>
t4: ch = store<ST4[%retval]> t0, Constant:i32<0>,<br>
FrameIndex:i32<0>, undef:i32<br>
t7: ch = store<ST4[%sz]> t4, Constant:i32<256>,<br>
FrameIndex:i32<2>, undef:i32<br>
t19: ch = store<ST4[%dir]> t7, Constant:i32<-1082130432>,<br>
FrameIndex:i32<3>, undef:i32<br>
t12: ch = store<ST4[%m]> t19, Constant:i32<0>, FrameIndex:i32<19>,<br>
undef:i32<br>
t13: i32,ch = load<LD4[%sz]> t12, FrameIndex:i32<2>, undef:i32<br>
t15: ch = store<ST4[%j]> t13:1, t13, FrameIndex:i32<16>, undef:i32<br>
t17: ch = store<ST4[%le]> t15, t13, FrameIndex:i32<14>, undef:i32<br>
<br>
<br>
Optimized legalized selection DAG: BB#0 'main:entry'<br>
SelectionDAG has 18 nodes:<br>
t0: ch = EntryToken<br>
t4: ch = store<ST4[%retval]> t0, Constant:i32<0>,<br>
FrameIndex:i32<0>, undef:i32<br>
t7: ch = store<ST4[%sz]> t4, Constant:i32<256>,<br>
FrameIndex:i32<2>, undef:i32<br>
t19: ch = store<ST4[%dir]> t7, Constant:i32<-1082130432>,<br>
FrameIndex:i32<3>, undef:i32<br>
t12: ch = store<ST4[%m]> t19, Constant:i32<0>, FrameIndex:i32<19>,<br>
undef:i32<br>
t13: i32,ch = load<LD4[%sz]> t12, FrameIndex:i32<2>, undef:i32<br>
t15: ch = store<ST4[%j]> t13:1, t13, FrameIndex:i32<16>, undef:i32<br>
t17: ch = store<ST4[%le]> t15, t13, FrameIndex:i32<14>, undef:i32<br>
<br>
<br>
===== Instruction selection begins: BB#0 'entry'<br>
ISEL: Starting pattern match on root node: t17: ch = store<ST4[%le]><br>
t15, t13, FrameIndex:i32<14>, undef:i32<br>
<br>
Match failed at index 0<br>
LLVM ERROR: Cannot select: t17: ch = store<ST4[%le]> t15, t13,<br>
FrameIndex:i32<14>, undef:i32<br>
t13: i32,ch = load<LD4[%sz]> t12, FrameIndex:i32<2>, undef:i32<br>
t6: i32 = FrameIndex<2><br>
t3: i32 = undef<br>
t16: i32 = FrameIndex<14><br>
t3: i32 = undef<br>
In function: main<br>
<br>
<br>
<br>
On Tue, Jun 21, 2016 at 11:19 AM, Krzysztof Parzyszek via llvm-dev<br></div></div><span class="">
<<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a> <mailto:<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>>> wrote:<br>
<br>
On 6/21/2016 11:12 AM, Jeff E via llvm-dev wrote:<br>
<br>
<br>
Also - It would be great if someone could point me to a document<br>
that<br>
describes some of these error messages? For example what does<br>
t26 ..t4 mean?<br>
<br>
<br>
The t.. are just identifiers of the DAG nodes. It used to print<br>
addresses, but they were long and would change every time.<br>
<br>
The "cannot select" errors are not that hard to track down: compile<br>
the failing testcase with -debug-only=isel and you'll see all the<br>
steps being taken up to the moment of failure. The last few<br>
messages will be something like "match failed at nnn". In your<br>
build directory in lib/Target/<yourtarget> there will be a file<br>
<yourtarget>GenDAGISel.inc. It contains the matching "script". The<br>
numbers nnn are shown in comments in that file and correspond to the<br>
steps the matcher performs. You'll be able to see what exactly it's<br>
trying to match.<br>
<br>
-Krzysztof<br>
<br>
<br>
--<br>
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,<br>
hosted by The Linux Foundation<br>
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</blockquote><div class="HOEnZb"><div class="h5">
<br>
<br>
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Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation<br>
</div></div></blockquote></div><br></div>