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</o:shapelayout></xml><![endif]--></head><body bgcolor=white lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Yes, you understand me. I am phd student in university of technology HCM city in Viet Nam, I want to apply new instruction scheduling algorithm for Clustered VLIW architecture. At the moment, I try to find a tool to generate data flow graph(DFG) before implement new algorithm.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Thanks for support.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Huy<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><div><div style='border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0cm 0cm 0cm'><p class=MsoNormal><b><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:windowtext'>From:</span></b><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:windowtext'> John Criswell [mailto:jtcriswel@gmail.com] <br><b>Sent:</b> Sunday, June 19, 2016 1:52 AM<br><b>To:</b> huyite; llvm-dev@lists.llvm.org<br><b>Subject:</b> Re: [llvm-dev] data flow graph<o:p></o:p></span></p></div></div><p class=MsoNormal><o:p> </o:p></p><div><p class=MsoNormal>On 6/18/16 1:38 PM, huyite wrote:<o:p></o:p></p></div><blockquote style='margin-top:5.0pt;margin-bottom:5.0pt'><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'>Dear professor John Criswell<o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> I would like <b>to implement a new instruction scheduling algorithm</b> so that I need the Data flow graph(DFG) is input of the algorithm.<o:p></o:p></p></div></blockquote><p class=MsoNormal><br>If I understand correctly, you need the data flow graph of the machine instructions, correct? That would imply that you're analyzing the MachineInstr IR and that you need the data dependencies between machine instructions, correct?<br><br>I do not know of a data flow graph analysis at the MI level. However, we have built a very basic reaching definitions analysis for registers at the MI level for x86 (it might work on other architectures, too, though I'm not sure). We will be extending it to handle stack locations in the near future. If this could would help you, please let me know.<br><br>Have you looked at LLVM's existing instruction scheduler to see how it handles data dependencies?<br><br>Regards,<br><br>John Criswell<br><br><br><o:p></o:p></p><blockquote style='margin-top:5.0pt;margin-bottom:5.0pt'><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> <o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'>Thanks<o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> Huy<o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> <o:p></o:p></p><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><b>From:</b> John Criswell [<a href="mailto:jtcriswel@gmail.com">mailto:jtcriswel@gmail.com</a>] <br><b>Sent:</b> Sunday, June 19, 2016 1:25 AM<br><b>To:</b> huyite; <a href="mailto:llvm-dev@lists.llvm.org">llvm-dev@lists.llvm.org</a><br><b>Subject:</b> Re: [llvm-dev] data flow graph<o:p></o:p></p></div></div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> <o:p></o:p></p><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'>Dear Huyite,<br><br>Your question, as stated, is too broad to answer. It would help if your question were more specific; what is it that you want to accomplish? Are you interested in data flow within SSA virtual registers, or are you interested in data that is stored in memory (which is not in SSA form)? Are you analyzing code at the LLVM IR level or at the MachineInstr (MI) or MC level? Are you wanting to print a data-flow graph, or are you developing an analysis that needs to understand a program's data flow in some way?<br><br>Without a more specific question, I cannot give a useful answer.<br><br>Regards,<br><br>John Criswell<br><br><br>On 6/16/16 9:15 AM, huyite via llvm-dev wrote:<o:p></o:p></p></div><blockquote style='margin-top:5.0pt;margin-bottom:5.0pt'><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'>Dear all,<o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> Please help me to generate DFG(Data flow graph) in LLVM.<o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> <o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span lang=VI>Best regards,</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span lang=VI> Huy</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><i><span lang=VI> </span></i><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><i><span lang=VI>Mobile: </span>+84942976091</i><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> <o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;margin-bottom:12.0pt'><br><br><o:p></o:p></p><pre>_______________________________________________<o:p></o:p></pre><pre>LLVM Developers mailing list<o:p></o:p></pre><pre><a href="mailto:llvm-dev@lists.llvm.org">llvm-dev@lists.llvm.org</a><o:p></o:p></pre><pre><a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev</a><o:p></o:p></pre></blockquote><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> <o:p></o:p></p><p> <o:p></o:p></p><pre>-- <o:p></o:p></pre><pre>John Criswell<o:p></o:p></pre><pre>Assistant Professor<o:p></o:p></pre><pre>Department of Computer Science, University of Rochester<o:p></o:p></pre><pre><a href="http://www.cs.rochester.edu/u/criswell">http://www.cs.rochester.edu/u/criswell</a><o:p></o:p></pre></div></blockquote><p class=MsoNormal><o:p> </o:p></p><p><o:p> </o:p></p><pre>-- <o:p></o:p></pre><pre>John Criswell<o:p></o:p></pre><pre>Assistant Professor<o:p></o:p></pre><pre>Department of Computer Science, University of Rochester<o:p></o:p></pre><pre><a href="http://www.cs.rochester.edu/u/criswell">http://www.cs.rochester.edu/u/criswell</a><o:p></o:p></pre></div></body></html>