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<div class="moz-cite-prefix">On 6/18/16 1:38 PM, huyite wrote:<br>
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<p class="MsoNormal"><span>Dear professor </span>John Criswell</p>
<p class="MsoNormal"> I would like <b>to implement a new
instruction scheduling algorithm</b> so that I need the Data
flow graph(DFG) is input of the algorithm.</p>
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<br>
If I understand correctly, you need the data flow graph of the
machine instructions, correct? That would imply that you're
analyzing the MachineInstr IR and that you need the data
dependencies between machine instructions, correct?<br>
<br>
I do not know of a data flow graph analysis at the MI level.
However, we have built a very basic reaching definitions analysis
for registers at the MI level for x86 (it might work on other
architectures, too, though I'm not sure). We will be extending it
to handle stack locations in the near future. If this could would
help you, please let me know.<br>
<br>
Have you looked at LLVM's existing instruction scheduler to see how
it handles data dependencies?<br>
<br>
Regards,<br>
<br>
John Criswell<br>
<br>
<blockquote cite="mid:00a601d1c990$98d737d0$ca85a770$@gmail.com"
type="cite">
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<p class="MsoNormal"> </p>
<p class="MsoNormal">Thanks</p>
<p class="MsoNormal"> Huy<span></span></p>
<p class="MsoNormal"><span> </span></p>
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<p class="MsoNormal"><b><span>From:</span></b><span> John
Criswell [<a class="moz-txt-link-freetext" href="mailto:jtcriswel@gmail.com">mailto:jtcriswel@gmail.com</a>] <br>
<b>Sent:</b> Sunday, June 19, 2016 1:25 AM<br>
<b>To:</b> huyite; <a class="moz-txt-link-abbreviated" href="mailto:llvm-dev@lists.llvm.org">llvm-dev@lists.llvm.org</a><br>
<b>Subject:</b> Re: [llvm-dev] data flow graph</span></p>
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<p class="MsoNormal"> </p>
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<p class="MsoNormal">Dear Huyite,<br>
<br>
Your question, as stated, is too broad to answer. It would
help if your question were more specific; what is it that
you want to accomplish? Are you interested in data flow
within SSA virtual registers, or are you interested in data
that is stored in memory (which is not in SSA form)? Are
you analyzing code at the LLVM IR level or at the
MachineInstr (MI) or MC level? Are you wanting to print a
data-flow graph, or are you developing an analysis that
needs to understand a program's data flow in some way?<br>
<br>
Without a more specific question, I cannot give a useful
answer.<br>
<br>
Regards,<br>
<br>
John Criswell<br>
<br>
<br>
On 6/16/16 9:15 AM, huyite via llvm-dev wrote:<span></span></p>
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<blockquote>
<p class="MsoNormal">Dear all,</p>
<p class="MsoNormal"> Please help me to generate DFG(Data
flow graph) in LLVM.</p>
<p class="MsoNormal"> </p>
<p class="MsoNormal"><span lang="VI">Best regards,</span></p>
<p class="MsoNormal"><span lang="VI"> Huy</span></p>
<p class="MsoNormal"><i><span lang="VI"> </span></i></p>
<p class="MsoNormal"><i><span lang="VI">Mobile: </span>+84942976091</i></p>
<p class="MsoNormal"> </p>
<p class="MsoNormal"><span><br>
<br>
<br>
</span></p>
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<p class="MsoNormal"><span> </span></p>
<p> </p>
<pre>-- </pre>
<pre>John Criswell</pre>
<pre>Assistant Professor</pre>
<pre>Department of Computer Science, University of Rochester</pre>
<pre><a moz-do-not-send="true" href="http://www.cs.rochester.edu/u/criswell">http://www.cs.rochester.edu/u/criswell</a></pre>
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<p><br>
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<pre class="moz-signature" cols="72">--
John Criswell
Assistant Professor
Department of Computer Science, University of Rochester
<a class="moz-txt-link-freetext" href="http://www.cs.rochester.edu/u/criswell">http://www.cs.rochester.edu/u/criswell</a></pre>
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