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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Hi,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">For now no.
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">But I will add this three builtins to CGBuiltin.cpp.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">If you want, you can be a reviewer of this change.  <o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Regards
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Michael Zuckerman
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> <o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><a name="_MailEndCompose"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></a></p>
<p class="MsoNormal"><a name="_____replyseparator"></a><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> Craig Topper [mailto:craig.topper@gmail.com]
<br>
<b>Sent:</b> Thursday, April 28, 2016 04:53<br>
<b>To:</b> Zuckerman, Michael <michael.zuckerman@intel.com><br>
<b>Subject:</b> Re: r267690 - [Clang][BuiltIn][AVX512]Adding intrinsics for vmovntdqa vmovntpd vmovntps instruction set<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
<div>
<p class="MsoNormal">Can we use native IR for the stores the way the 128-bit and 256-bit equivalents do?<o:p></o:p></p>
</div>
<div>
<p class="MsoNormal"><o:p> </o:p></p>
<div>
<p class="MsoNormal">On Wed, Apr 27, 2016 at 3:44 AM, Michael Zuckerman via cfe-commits <<a href="mailto:cfe-commits@lists.llvm.org" target="_blank">cfe-commits@lists.llvm.org</a>> wrote:<o:p></o:p></p>
<blockquote style="border:none;border-left:solid #CCCCCC 1.0pt;padding:0cm 0cm 0cm 6.0pt;margin-left:4.8pt;margin-right:0cm">
<p class="MsoNormal">Author: mzuckerm<br>
Date: Wed Apr 27 05:44:15 2016<br>
New Revision: 267690<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=267690&view=rev" target="_blank">
http://llvm.org/viewvc/llvm-project?rev=267690&view=rev</a><br>
Log:<br>
[Clang][BuiltIn][AVX512]Adding intrinsics for vmovntdqa vmovntpd vmovntps instruction set<br>
<br>
Differential Revision: <a href="http://reviews.llvm.org/D19529" target="_blank">http://reviews.llvm.org/D19529</a><br>
<br>
<br>
Modified:<br>
    cfe/trunk/include/clang/Basic/BuiltinsX86.def<br>
    cfe/trunk/lib/Headers/avx512fintrin.h<br>
    cfe/trunk/test/CodeGen/avx512f-builtins.c<br>
<br>
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=267690&r1=267689&r2=267690&view=diff" target="_blank">
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=267690&r1=267689&r2=267690&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)<br>
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Wed Apr 27 05:44:15 2016<br>
@@ -2185,6 +2185,10 @@ TARGET_BUILTIN(__builtin_ia32_kortestzhi<br>
 TARGET_BUILTIN(__builtin_ia32_kunpckhi, "UsUsUs","","avx512f")<br>
 TARGET_BUILTIN(__builtin_ia32_kxnorhi, "UsUsUs","","avx512f")<br>
 TARGET_BUILTIN(__builtin_ia32_kxorhi, "UsUsUs","","avx512f")<br>
+TARGET_BUILTIN(__builtin_ia32_movntdq512, "vV8LLi*V8LLi","","avx512f")<br>
+TARGET_BUILTIN(__builtin_ia32_movntdqa512, "V8LLiV8LLi*","","avx512f")<br>
+TARGET_BUILTIN(__builtin_ia32_movntpd512, "vd*V8d","","avx512f")<br>
+TARGET_BUILTIN(__builtin_ia32_movntps512, "vf*V16f","","avx512f")<br>
<br>
 #undef BUILTIN<br>
 #undef TARGET_BUILTIN<br>
<br>
Modified: cfe/trunk/lib/Headers/avx512fintrin.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=267690&r1=267689&r2=267690&view=diff" target="_blank">
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=267690&r1=267689&r2=267690&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)<br>
+++ cfe/trunk/lib/Headers/avx512fintrin.h Wed Apr 27 05:44:15 2016<br>
@@ -7324,6 +7324,30 @@ _mm512_kxor (__mmask16 __A, __mmask16 __<br>
   return (__mmask16) __builtin_ia32_kxorhi ((__mmask16) __A, (__mmask16) __B);<br>
 }<br>
<br>
+static __inline__ void __DEFAULT_FN_ATTRS<br>
+_mm512_stream_si512 (__m512i * __P, __m512i __A)<br>
+{<br>
+  __builtin_ia32_movntdq512 ((__v8di *) __P, (__v8di) __A);<br>
+}<br>
+<br>
+static __inline__ __m512i __DEFAULT_FN_ATTRS<br>
+_mm512_stream_load_si512 (void *__P)<br>
+{<br>
+  return __builtin_ia32_movntdqa512 ((__v8di *)__P);<br>
+}<br>
+<br>
+static __inline__ void __DEFAULT_FN_ATTRS<br>
+_mm512_stream_pd (double *__P, __m512d __A)<br>
+{<br>
+  __builtin_ia32_movntpd512 (__P, (__v8df) __A);<br>
+}<br>
+<br>
+static __inline__ void __DEFAULT_FN_ATTRS<br>
+_mm512_stream_ps (float *__P, __m512 __A)<br>
+{<br>
+  __builtin_ia32_movntps512 (__P, (__v16sf) __A);<br>
+}<br>
+<br>
 #undef __DEFAULT_FN_ATTRS<br>
<br>
 #endif // __AVX512FINTRIN_H<br>
<br>
Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=267690&r1=267689&r2=267690&view=diff" target="_blank">
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=267690&r1=267689&r2=267690&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/avx512f-builtins.c (original)<br>
+++ cfe/trunk/test/CodeGen/avx512f-builtins.c Wed Apr 27 05:44:15 2016<br>
@@ -5053,3 +5053,28 @@ __mmask16 test_mm512_kxor(__mmask16 __A,<br>
   // CHECK: @llvm.x86.avx512.kxor.w<br>
   return _mm512_kxor(__A, __B);<br>
 }<br>
+<br>
+void test_mm512_stream_si512(__m512i * __P, __m512i __A) {<br>
+  // CHECK-LABEL: @test_mm512_stream_si512<br>
+  // CHECK: @llvm.x86.avx512.storent.q.512<br>
+  _mm512_stream_si512(__P, __A);<br>
+}<br>
+<br>
+__m512i test_mm512_stream_load_si512(void *__P) {<br>
+  // CHECK-LABEL: @test_mm512_stream_load_si512<br>
+  // CHECK: @llvm.x86.avx512.movntdqa<br>
+  return _mm512_stream_load_si512(__P);<br>
+}<br>
+<br>
+void test_mm512_stream_pd(double *__P, __m512d __A) {<br>
+  // CHECK-LABEL: @test_mm512_stream_pd<br>
+  // CHECK: @llvm.x86.avx512.storent.pd.512<br>
+  return _mm512_stream_pd(__P, __A);<br>
+}<br>
+<br>
+void test_mm512_stream_ps(float *__P, __m512 __A) {<br>
+  // CHECK-LABEL: @test_mm512_stream_ps<br>
+  // CHECK: @llvm.x86.avx512.storent.ps.512<br>
+  _mm512_stream_ps(__P, __A);<br>
+}<br>
+<br>
<br>
<br>
_______________________________________________<br>
cfe-commits mailing list<br>
<a href="mailto:cfe-commits@lists.llvm.org">cfe-commits@lists.llvm.org</a><br>
<a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits</a><o:p></o:p></p>
</blockquote>
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<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">-- <o:p></o:p></p>
<div>
<p class="MsoNormal">~Craig<o:p></o:p></p>
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</div>
</div>
<p>---------------------------------------------------------------------<br>
Intel Israel (74) Limited</p>

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