<div dir="ltr"><div><div>Hi all,<br><br></div>I'm compiling a C/OpenMP application with clang/LLVM v 3.7.1 on aarch64 ("-target aarch64-linux-gnu"). I'm also compiling with "-g" and "-gdwarf-aranges" to get debugging information for my application. For most source code files (i.e. ones without OpenMP pragmas), the compiler puts frame description entries (FDEs) in the ".debug_frame" section of my executable. The output from readelf looks pretty sane (in particular, the address ranges look correct):<br><br></div>$ readelf --debug-dump=frames-interp <my bin><br><br><div>Contents of the .debug_frame section:<br><br>00000000 0000000000000014 ffffffff CIE "" cf=1 df=-4 ra=30<br> LOC CFA <br>0000000000000000 r31+0 <br><br>00000018 0000000000000024 00000000 FDE cie=00000000 <b>pc=0000000000410000..0000000000410238</b><br> LOC CFA r19 r20 r21 r22 r29 ra <br>0000000000410000 r31+0 u u u u u u <br>0000000000410014 r29+16 c-24 c-32 c-40 c-48 c-16 c-8 <br>...<br clear="all"><div><div><br></div><div>However for the source code file with OpenMP pragmas, the compiler puts frame descriptor entries in the ".eh_frame" section. I'm assuming this is because LLVM's OpenMP runtime is compiled using C++ and therefore needs asynchronous unwind tables. Not a problem, but it's populating the address ranges with (seemingly) bad values:<br></div><div><br>Contents of the .eh_frame section:<br><br>00000000 0000000000000014 00000000 CIE "zR" cf=1 df=-4 ra=30<br> LOC CFA <br>0000000000000000 r31+0 <br><br>00000018 000000000000001c 0000001c FDE cie=00000000 <b>pc=ffffffffe0594070..ffffffffe05940ac</b><br> LOC CFA r29 ra <br>ffffffffe0594070 r31+0 u u <br>ffffffffe059407c r29+16 c-16 c-8 <br>...<br><br></div><div>Is this a bug, or are those address ranges correct? How am I supposed to be interpreting those? Note that I don't have code anywhere near that address range in my binary. Thanks!<br></div><div><br>-- <br><div class="gmail_signature"><div dir="ltr"><div><div dir="ltr"><div><div dir="ltr"><div><div dir="ltr"><div><div dir="ltr"><div><div dir="ltr"><div><div dir="ltr"><div><div dir="ltr"><div><div dir="ltr"><div><div><span>Rob Lyerly</span><br></div><div>Graduate Research Assistant, Systems Software Research Group<br><br></div><div><img src="https://upload.wikimedia.org/wikipedia/en/thumb/2/23/Virginiatechseal.svg/200px-Virginiatechseal.svg.png" height="76" width="75"> <img src="http://www.oocities.org/rainforestwind/divider_black_vertical.jpg" height="75" width="8"><img src="http://www.ece.vt.edu/images/inside-top-ecelogo.png" height="55" width="272"></div></div></div></div></div></div></div></div></div></div></div></div></div></div></div></div></div></div></div></div>
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