<div dir="ltr">Hello,<div><br></div><div>Probably this may be too late to start thinking about this project but I think this is particularly useful feature for LLVM. A quick use I can think of this is Implementing Inter-procedural Register Allocation ( for Research purpose ).</div><div><br></div><div>I have start looking at the code for MachineFunctionPass, I think currently MachineModule class is not available ( the project work will include that ) but trying to find out required details to first create a MachineModule class which holds references to required information. I am also trying to figure out what are the things should compose MachineModule class ( some sort of analogy with Module class used for IR passes)</div><div><br></div><div>After that I think next step is to extend the ModulePass and let ModulePass execute optimization provide enough information.</div><div><br></div><div>Am I going in correct direction?</div><div>Please provide some pointers.</div><div><br></div><div>Sincerely,<br clear="all"><div><div class="gmail_signature"><div dir="ltr"><div><div dir="ltr"><i><font size="2" face="monospace, monospace"><b>Vivek Pandya</b></font></i><div><br></div></div></div></div></div></div>
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