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Over in pr26718, we ran across a case where input IR had one PHI
within a basic block using the value of another PHI within the same
basic block (without a backedge). There has been some disagreement
as to whether this is valid IR. I believe it is not. <br>
<br>
The verifier currently accepts the following code without error:<br>
<pre class="bz_comment_text" id="comment_text_7">define void @f() {
entry:
br label %next
next:
%y = phi i32 [ 0, %entry ]
%x = phi i32 [ %y, %entry ]
ret void
}
</pre>
Looking at the code, this may be an oversight - due to a special
casing of the dominance relation within a single basic block - but
that's not <i>obviously</i> true. Thus, we need to clarify what
the intended semantics are.<br>
<br>
The lang ref seems pretty clear about this:
<br>
"For the purposes of the SSA form, the use of each incoming value is
deemed to occur on the edge from the corresponding predecessor block
to the current block (but after any definition of an ‘invoke‘
instruction’s return value on the same edge)."<br>
<br>
But David pointed out that various bits of the optimizer appear to
have code and test cases covering exactly this case. <br>
<br>
So, is this legal IR? Or not?<br>
<br>
Philip<br>
<br>
<br>
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