<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Feb 9, 2016 at 2:39 PM, Jacques Pienaar <span dir="ltr"><<a href="mailto:jpienaar@google.com" target="_blank">jpienaar@google.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">The ISA & encoding is documented in the comments and diagrams of lib/Target/Lanai/LanaiInstrFor<a href="http://mats.td" target="_blank">mats.td</a>. If that makes sense I'll add a link to this tablegen in docs/CompilerWriterInfo.rst.</div></blockquote><div><br></div><div>Generally CompilerWriterInfo is reserved for "official" documents from hardware vendors.</div><div><br></div><div>One of the main uses of CompilerWriterInfo is to have authoritative specs that can be used to make decisions about whether our backends are correct or not, so it is somewhat tautological to link to our backends :)</div><div><br></div><div>-- Sean Silva</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div><br></div><div>Thanks,</div><div><br></div><div>Jacques</div></div><div class="HOEnZb"><div class="h5"><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Feb 9, 2016 at 2:12 PM, Sean Silva <span dir="ltr"><<a href="mailto:chisophugis@gmail.com" target="_blank">chisophugis@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Do you have a psABI document? Or an ISA reference? Or an encoding reference?<div><br></div><div>I know at least the encoding reference is missing for AArch64, so it's not a huge deal, but anything we can put in <a href="http://llvm.org/docs/CompilerWriterInfo.html" target="_blank">http://llvm.org/docs/CompilerWriterInfo.html</a> (docs/CompilerWriterInfo.rst) would be appreciated.</div><span><font color="#888888"><div><br></div><div>-- Sean Silva</div></font></span></div><div class="gmail_extra"><br><div class="gmail_quote"><div><div>On Tue, Feb 9, 2016 at 9:40 AM, Jacques Pienaar via llvm-dev <span dir="ltr"><<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>></span> wrote:<br></div></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div><div dir="ltr"><div>Hi all,</div><div><br></div><div>We would like to contribute a new backend for the Lanai processor (derived from the processor described in [1]).</div><div><br></div><div>Lanai is a simple in-order 32-bit processor with:</div><div> * 32 32-bit registers, including:</div><div> * 2 registers with fixed values;</div><div> * 4 used for program state tracking (PC, SP, FP, RCA);</div><div> * 2 reserved for explicit usage by user (R10 and R11), used in threading library;</div><div> * Up to 4 used for argument passing;</div><div> * No callee-saved registers</div><div> * No floating point support</div><div><br></div><div>Backend development is focused primarily on compiling C99 code (no exception support). The patches implement all the parts required for code generation:</div><div><br></div><div>* LLVM triple: <a href="http://reviews.llvm.org/D17003" target="_blank">http://reviews.llvm.org/D17003</a></div><div>* Clang support: <a href="http://reviews.llvm.org/D17002" target="_blank">http://reviews.llvm.org/D17002</a></div><div>* MCExpr & ELF: <a href="http://reviews.llvm.org/D17008" target="_blank">http://reviews.llvm.org/D17008</a></div><div>* Lanai backend (lib/Target/Lanai): <a href="http://reviews.llvm.org/D17011" target="_blank">http://reviews.llvm.org/D17011</a></div><div><br></div><div>We are still actively developing the backend and have many optimizations in mind.</div><div><br></div><div>I'll be the maintainer of this backend.</div><div><br></div><div>Please leave code comments on the Phab patches, while discussing high-level comments about the backend on this llvm-dev thread.</div><div><br></div><div>Thanks,</div><div><br></div><div>Jacques</div><div><br></div><div>[1] David E. Culler, Anoop Gupta, and Jaswinder Pal Singh. 1997. Parallel Computer Architecture: A Hardware/Software Approach (1st ed.). Morgan Kaufmann Publishers Inc., San Francisco, CA, USA.</div></div>
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