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<p class="MsoNormal"><span lang="EN-US" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">I strongly agree with this. A further reason why explicit modes are desirable are (pseudo)architectures such as PTX which encode the rounding mode
within the instruction itself. It should also make *<b>some</b>* optimizations on x86 possible by reducing the number of environment mode changes.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">PS Sorry for sending this twice, I initially forgot to add the list.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">--<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Johannes S. Mueller-Roemer, MSc<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Wiss. Mitarbeiter - Interactive Engineering Technologies (IET)<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Fraunhofer-Institut für Graphische Datenverarbeitung IGD<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Fraunhoferstr. 5 | 64283 Darmstadt | Germany<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Tel +49 6151 155-606 | Fax +49 6151 155-139<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">johannes.mueller-roemer@igd.fraunhofer.de | www.igd.fraunhofer.de<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> llvm-dev [mailto:llvm-dev-bounces@lists.llvm.org]
<b>On Behalf Of </b>Chandler Carruth via llvm-dev<br>
<b>Sent:</b> Friday, February 05, 2016 03:06<br>
<b>To:</b> Mehdi Amini; llvm-dev<br>
<b>Subject:</b> Re: [llvm-dev] [RFC] FP Environment and Rounding mode handling in LLVM<o:p></o:p></span></p>
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<p class="MsoNormal">First, thanks Mehdi for putting something on llvm-dev and getting wider awareness of this.<o:p></o:p></p>
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<p class="MsoNormal">I am actually really interested in finding a way for LLVM to support the interesting functionality we are missing from fenv-like interfaces. Things like rounding modes, exceptions, etc. However, I think the current design is going to be
a really high burden for the entire optimizer and I think there is a simpler model that we might pursue instead.<o:p></o:p></p>
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<p class="MsoNormal">I'll start off with some underlying principles that I'm operating from:<o:p></o:p></p>
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<p class="MsoNormal">a) Most code in the world will be very happy with the default floating point environment, doesn't need to carefully model floating point exceptions, etc. Essentially, I think that LLVM's behavior today is probably right for most code. Now,
the code which needs support for the other features of floating point isn't bad or unimportant! But it is relatively speaking rare, and so I think it is reasonable to optimize the *representation* model for the common case provided we don't lose support for
functionality.<o:p></o:p></p>
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<p class="MsoNormal">a) When outside the default floating point environment's rules, there are few if any optimizations that we realistically expect from LLVM. Certainly, any changes to the LLVM optimizer which impact code outside the default needs to be done
*much* more carefully to avoid introducing subtle bugs.<o:p></o:p></p>
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<p class="MsoNormal">OK, based on that, consider the following model:<o:p></o:p></p>
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<p class="MsoNormal">We provide intrinsics that mirror the instructions 'fadd', 'fsub', 'fmul', 'fdiv', and 'frem' (so 5 total). From here on out, I'll exclusively use 'fadd' as my examples. The intrinsics would look like:<o:p></o:p></p>
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<p class="MsoNormal"> declare {f32, i1} @llvm.fadd.with.environment.f32(f32 %lhs, f32 %rhs, i8 %rounding_mode, i8 %exception_behavior)<o:p></o:p></p>
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<p class="MsoNormal">Then we define specific values to be used for the IEEE rounding modes. And we define values to control exception behavior. I'm not an expert on floating point exceptions in particular (my platforms don't use them) but I'm imagining three
states "ignore", "return", and "trap". I've used a single 'i1', but I'm assuming it would need to be several i1s or an iN in order to model the set of FP exceptions. I'm using i1 here just to simplify the explanation, I think it generalizes and I'll let the
experts suggest the exact formulation.<o:p></o:p></p>
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<p class="MsoNormal">If the default rounding mode is provided to these intrinsics and the "ignore" exception behavior is provided, they behave exactly as the existing instructions do, and instcombine should canonicalize to the existing instructions.<o:p></o:p></p>
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<p class="MsoNormal">The semantics of non-default rounding modes are to perform the operation with that rounding mode.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">If "return" is provided for the exception behavior, then the i1 component of the result is true if an FP exception occured and false otherwise. If "ignore" is provided then any FP exceptions are ignored and the i1 is always false. If "trap"
is provided then the i1 is always false, but the call to the intrinsic might trap. We could either define a trap as precisely the same as a call to @llvm.trap(), or we could introduce an @llvm.fp.trap() and define it as a call to that.<o:p></o:p></p>
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<p class="MsoNormal">The frontend would then be responsible for lowering floating point arithmetic using these intrinsics. This may be somewhat challenging because in the frontend behavior is controlled dynamically in some languages. In those situations, we
can either allow these intrinsics to accept non-constant arguments for %rounding_mode and %exception_behavior so that frontends can emit code that just dynamically computes them, or we could follow the same model that atomics use, and if the frontend cannot
trivially compute a constant, it can emit a switch over the possible states with a specific intrinsic call in each case. I don't have strong opinions about which would be best, I think either could be made to work.<o:p></o:p></p>
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<p class="MsoNormal">If we go with constant arguments being required, we could use "metadata arguments" which aren't actually metadata but just encoded arguments for intrinsics.<o:p></o:p></p>
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<p class="MsoNormal">When emitting constants and trying to respect floating point environment settings, frontends will have to emit runtime calls instead of actual constants. But this seems actually good because that is what we'll need anyways -- we aren't
able to with full generality emulate all the environment options if I understand things correctly (and let me know if I've misunderstood).<o:p></o:p></p>
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<p class="MsoNormal">The two really big reasons why I like this model much more than extending flags are:<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">1) This avoids implicit state. The implicit state of the floating point environment makes things like code motion extremely hard to reason about. I think we will just get it wrong too often to make this a good approach. By modeling all
of this as actual SSA values I think there is a much better chance we'll get this stuff right. For example by or-ing all the i1s for floating point exceptions and testing the result to implement fetestexcept. Then the backend can spill the state when necessary
and reload it when needed even if other floating point math is introduced. I admit that first class aggregate returns aren't a beautiful way to encapsulate this, but they are an *effective* way that we know how to work with in the LLVM IR. If we ever come
up with a better multi-def model, we can always switch these and all the other intrinsics which need this to that model.<o:p></o:p></p>
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<p class="MsoNormal">2) Every pass will conservatively correctly model the operations. This is most significant when modeling trapping on exceptions. We need every pass to realize that control flow might not proceed past such operations. We already have this
logic for calls, and it seems a really nice fit for allowing most of the optimizer to be unaware of these constructs while respecting them and preserving behavior in the face of them.<o:p></o:p></p>
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<p class="MsoNormal">I suspect that there are things this model doesn't handle that I've not thought of (as this is outside the are of FP that I'm deeply familiar with), but I really think this model would be easier to reason about and would be much less invasive
within the IR and optimizer. I wonder if folks think this could work and would be up for moving their efforts in this direction?<o:p></o:p></p>
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<p class="MsoNormal">-Chandler<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">On Wed, Feb 3, 2016 at 3:04 PM Mehdi Amini <<a href="mailto:mehdi.amini@apple.com" target="_blank">mehdi.amini@apple.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">Hi everyone,<br>
<br>
Sergey (CC’ed) worked on a series of patches to add support for floating-point environment and floating-point rounding modes in LLVM.<br>
This started *in 2014* and the patches after multiple rounds of review in the last months (involving amongst other Steve Canon, Hal Finkel, David Majnemer, and myself) are getting very close (IMO) to be in a state where we can land them.<br>
<br>
This is the thread that started this development: “ [LLVMdev] More careful treatment of floating point exceptions"
<a href="http://marc.info/?l=llvm-dev&m=141113983302113&w=2" target="_blank">http://marc.info/?l=llvm-dev&m=141113983302113&w=2</a><br>
And this is the thread where most of the discussion on the design occurred: "[PATCH] Flag to enable IEEE-754 friendly FP optimizations”
<a href="http://marc.info/?l=llvm-commits&m=141235814915999&w=2" target="_blank">
http://marc.info/?l=llvm-commits&m=141235814915999&w=2</a><br>
<br>
Since Chandler raised some concerns on IRC today, so I figured I should send a heads-up on this topic to allow any one to comment on the current plan.<br>
<br>
We plan on adding two new FP env flags to the existing FMF (fast-math flags). Without these flags set, the optimizer has to assume that the FP env can be observed, or the rounding mode can be changed. For clang, these flags would be set unless a command line
option would require to preserve the FP env.<br>
<br>
Here is the list of patches:<br>
<br>
[FPEnv Core 01/14] Add flags and command-line switches for FPEnv: <a href="http://reviews.llvm.org/D14066" target="_blank">
http://reviews.llvm.org/D14066</a><br>
[FPEnv Core 02/14] Add FPEnv access flags to fast-math flags: <a href="http://reviews.llvm.org/D14067" target="_blank">
http://reviews.llvm.org/D14067</a><br>
[FPEnv Core 03/14] Make SelectionDAG aware of FPEnv flags: <a href="http://reviews.llvm.org/D14068" target="_blank">
http://reviews.llvm.org/D14068</a><br>
[FPEnv Core 04/14] Skip constant folding to preserve FPEnv: <a href="http://reviews.llvm.org/D14069" target="_blank">
http://reviews.llvm.org/D14069</a><br>
[FPEnv Core 05/14] Teach IR builder and folders about new flags: <a href="http://reviews.llvm.org/D14070" target="_blank">
http://reviews.llvm.org/D14070</a><br>
[FPEnv Core 06/14] Do not fold constants on reading in IR asm/bitcode: <a href="http://reviews.llvm.org/D14071" target="_blank">
http://reviews.llvm.org/D14071</a><br>
[FPEnv Core 07/14] Prevent undesired folding by InstSimplify: <a href="http://reviews.llvm.org/D14072" target="_blank">
http://reviews.llvm.org/D14072</a><br>
[FPEnv Core 08/14] Do not simplify expressions with FPEnv access: <a href="http://reviews.llvm.org/D14073" target="_blank">
http://reviews.llvm.org/D14073</a><br>
[FPEnv Core 09/14] Make Strict flag available for more clients: <a href="http://reviews.llvm.org/D14074" target="_blank">
http://reviews.llvm.org/D14074</a><br>
[FPEnv Core 10/14] Use Strict in IRBuilder: <a href="http://reviews.llvm.org/D14075" target="_blank">
http://reviews.llvm.org/D14075</a><br>
[FPEnv Core 11/14] Don't convert fpops to constexprs in SCCP: <a href="http://reviews.llvm.org/D14076" target="_blank">
http://reviews.llvm.org/D14076</a><br>
[FPEnv Core 13/14] Don't hoist FP-ops with side-effects in LICM: <a href="http://reviews.llvm.org/D14078" target="_blank">
http://reviews.llvm.org/D14078</a><br>
[FPEnv Core 14/14] Introduce F*_W_CHAIN instrs to prevent reordering: <a href="http://reviews.llvm.org/D14079" target="_blank">
http://reviews.llvm.org/D14079</a><br>
<br>
<br>
—<br>
Mehdi<o:p></o:p></p>
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