<html><head><style type='text/css'>p { margin: 0; }</style></head><body><div style='font-family: arial,helvetica,sans-serif; font-size: 10pt; color: #000000'><br><hr id="zwchr"><blockquote style="border-left: 2px solid rgb(16, 16, 255); margin-left: 5px; padding-left: 5px; color: rgb(0, 0, 0); font-weight: normal; font-style: normal; text-decoration: none; font-family: Helvetica,Arial,sans-serif; font-size: 12pt;"><b>From: </b>"James Y Knight via llvm-dev" <llvm-dev@lists.llvm.org><br><b>To: </b>"Chris.Dewhurst" <Chris.Dewhurst@lero.ie><br><b>Cc: </b>llvm-dev@lists.llvm.org<br><b>Sent: </b>Friday, September 18, 2015 10:39:20 AM<br><b>Subject: </b>Re: [llvm-dev] multiply-accumulate instruction<br><br><div dir="ltr">Do you only want to define assembler syntax for this, or do you need to be able to be able to automatically emit it from some higher level construct? I'd expect the former would be entirely sufficient, in which case this should be sufficient:<div><p class="MsoNormal" style="font-size: 12.8px;"><span style="font-size: 10pt; font-family: monospace;">let Predicates = [HasLeon3, HasLeon4], Defs = [Y, ASR18], Uses = [Y, ASR18] in<u></u><u></u></span></p><p class="MsoNormal" style="font-size: 12.8px;"><span style="font-size: 10pt; font-family: monospace;">def SMACrr : F3_1<3, 0b111110,<u></u><u></u></span></p><p class="MsoNormal" style="font-size: 12.8px;"><span style="font-size: 10pt; font-family: monospace;"> (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),<u></u><u></u></span></p><p class="MsoNormal" style="font-size: 12.8px;"><span style="font-size: 10pt; font-family: monospace;"> "smac $rs1, $rs2, $rd",<u></u><u></u></span></p><p class="MsoNormal" style="font-size: 12.8px;"><span style="font-size: 10pt; font-family: monospace;"> [</span><span style="font-family: monospace; font-size: 10pt;">]>;</span></p><p class="MsoNormal" style="font-size: 12.8px;"><br></p><p id="DWT12744" class="MsoNormal" style="font-size: 12.8px;">If you want the latter, I'm not sure how you'd go about being able to pattern-match it, because of the unusual 40 bit accumulate input and output, and the unusual for sparc 16-bit inputs. Hopefully you don't really need that. :)</p></div></div></blockquote><br>To do that, you'll likely need a target-specific IR-level pass that runs in the backend to recognize the desired pattern and transform it into a loop using some target-specific intrinsics.<br><br> -Hal<br><br><blockquote style="border-left: 2px solid rgb(16, 16, 255); margin-left: 5px; padding-left: 5px; color: rgb(0, 0, 0); font-weight: normal; font-style: normal; text-decoration: none; font-family: Helvetica,Arial,sans-serif; font-size: 12pt;"><div dir="ltr"><div><p class="MsoNormal" style="font-size: 12.8px;"></p></div></div><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Sep 18, 2015 at 10:19 AM, Chris.Dewhurst via llvm-dev <span dir="ltr"><<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;">
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<p class="MsoNormal">I’m trying to define a multiply-accumulate instruction for the LEON processor, a Subtarget of the Sparc target.<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">The documentation for the processor is as follows:<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">===<u></u><u></u></p>
<p class="MsoNormal">To accelerate DSP algorithms, two multiply&accumulate instructions are implemented: UMAC and SMAC. The UMAC performs an unsigned 16-bit multiply, producing a 32-bit result, and adds the result to a 40-bit accumulator made up by the 8 lsb
bits from the %y register and the %asr18 register. The least significant 32 bits are also written to the destination register. SMAC works similarly but performs signed multiply and accumulate. The MAC instructions execute in one clock but have two clocks latency,
meaning that one pipeline stall cycle will be inserted if the following instruction uses the destination register of the MAC as a source operand.<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">Assembler syntax:<u></u><u></u></p>
<p class="MsoNormal"> smac rs1, reg_imm, rd<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">Operation:<u></u><u></u></p>
<p class="MsoNormal"> prod[31:0] = rs1[15:0] * reg_imm[15:0]<u></u><u></u></p>
<p class="MsoNormal"> result[39:0] = (Y[7:0] & %asr18[31:0]) + prod[31:0]<u></u><u></u></p>
<p class="MsoNormal"> (Y[7:0] & %asr18[31:0]) = result[39:0]<u></u><u></u></p>
<p class="MsoNormal"> rd = result[31:0]<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">%asr18 can be read and written using the rdasr and wrasr instructions.<u></u><u></u></p>
<p class="MsoNormal">===<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">I have the following in SparcInstrInfo to define the lowering rules for this instruction, but I feel that this isn’t likely to work as I need to somehow tie together the fact that %Y, %ASR18 and %rd are all related to each other in the
output.<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Monospace;">let Predicates = [HasLeon3, HasLeon4], Defs = [Y, ASR18], Uses = [Y, ASR18] in<u></u><u></u></span></p>
<p class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Monospace;">def SMACrr : F3_1<3, 0b111110,<u></u><u></u></span></p>
<p class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Monospace;"> (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2, ASRRegs:$asr18),<u></u><u></u></span></p>
<p class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Monospace;"> "smac $rs1, $rs2, $rd",<u></u><u></u></span></p>
<p class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Monospace;"> [(set i32:$rd,<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size: 10pt; font-family: Monospace;"> (add i32:$asr18, (mul i32:$rs1, i32:$rs2)))] >;<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size: 10pt; font-family: Monospace;"><u></u> <u></u></span></p>
<p class="MsoNormal"><span style="font-size: 10pt; font-family: Monospace;">Perhaps a well-chosen “let Constraints=” might be used here? If so, I’m not sure I know what to put in there. If not, can anyone help me how I might define the lowering rules for this
instruction please?<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size: 10pt; font-family: Monospace;"><u></u> <u></u></span></p>
<p class="MsoNormal"><span style="font-size: 10pt; font-family: Monospace;">Chris Dewhurst, University of Limerick.</span><u></u><u></u></p>
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<br>_______________________________________________<br>LLVM Developers mailing list<br>llvm-dev@lists.llvm.org<br>http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev<br></blockquote><br><br><br>-- <br><div><span name="x"></span>Hal Finkel<br>Assistant Computational Scientist<br>Leadership Computing Facility<br>Argonne National Laboratory<span name="x"></span><br></div></div></body></html>