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<p class="MsoNormal">LLVM currently treats Cortex-M4 and Cortex-R5 as having an FPU. However, it distinguishes other arm processors that come optionally with an FPU. These are: cortex-r4, arm1136j-s, arm1176jz-s, mpcore, and arm1156t2-s. Apparently this behaviour
is not uniform. Moreover, Target Parser and ARM.td are not synchronized. Would someone object to the changes that I propose with this patch?
<a href="http://reviews.llvm.org/D12692">http://reviews.llvm.org/D12692</a> I had to change some tests to make this work. I would appreciate some feedback on this issue.<br>
<br>
Thanks,<br>
Alexandros Lamprineas<o:p></o:p></p>
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