<html><head><meta http-equiv="Content-Type" content="text/html charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class=""><div class="">Hi Ryan,</div><br class=""><div><blockquote type="cite" class=""><div class="">On Aug 19, 2015, at 6:35 AM, Ryan Taylor via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org" class="">llvm-dev@lists.llvm.org</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class=""><div class="">Essentially it doesn't appear that the reg class assignment is based on uses and is instead inserting an extra COPY for this. Is this accurate? If so, why?</div></div></div></blockquote><div><br class=""></div><div>We match the instructions bottom-up and I believe that copy are automatically inserted when the register classes do not match.</div><div>That seems strange to me that the isel logs are exactly the same but still you are seeing a different result of instruction selection.</div><br class=""><blockquote type="cite" class=""><div class=""><div dir="ltr" class=""><div class=""><br class=""></div><div class="">In this above example, I'm getting an extra "mov %r0, $b1" (this is an MI::COPY) even though "mov @a, %b1" (this is an MI::MOV) is entirely acceptable since both GPRRegs and BaseRegs are in the reg class list..</div><div class=""><br class=""></div><div class="">If the heuristic is simply picking the first available reg class or the reg class with the most available, for example, instead of picking the reg class based on uses, I will have to change this heuristic to reduce code bloat, or we'll have to add backend passes to reduce the code bloat.</div></div></div></blockquote><div><br class=""></div><div>I think the current approach is rather simple and we just match the type for the first available reg class (assuming your selection dag patterns are not choosing something different). There are not per say passes to reduce this "code bloat” since we never encounter this problem in practice. The peephole optimizer has some logic to avoid this move and CodeGenPrepare also does a few transformation to avoid some of that.</div><div><br class=""></div><div>Anyhow, I’d say debug the isel process (probably the InstrEmitter part) to see where the problem arise.</div><div><br class=""></div><div>Cheers,</div><div>-Quentin</div><br class=""><blockquote type="cite" class=""><div class=""><div dir="ltr" class=""><div class=""><br class=""></div><div class="">Thanks.</div></div><div class="gmail_extra"><br class=""><div class="gmail_quote">On Mon, Aug 17, 2015 at 7:00 PM, Ryan Taylor <span dir="ltr" class=""><<a href="mailto:ryta1203@gmail.com" target="_blank" class="">ryta1203@gmail.com</a>></span> wrote:<br class=""><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr" class=""><br class=""><div class="gmail_quote">---------- Forwarded message ----------<br class="">From: <b class="gmail_sendername">Ryan Taylor</b> <span dir="ltr" class=""><<a href="mailto:ryta1203@gmail.com" target="_blank" class="">ryta1203@gmail.com</a>></span><br class="">Date: Mon, Aug 17, 2015 at 6:59 PM<br class="">Subject: Re: [LLVMdev] TableGen Register Class not matching for MI in 3.6<br class="">To: Quentin Colombet <<a href="mailto:qcolombet@apple.com" target="_blank" class="">qcolombet@apple.com</a>><br class="">Cc: "<a href="mailto:llvmdev@cs.uiuc.edu" target="_blank" class="">llvmdev@cs.uiuc.edu</a>" <<a href="mailto:llvmdev@cs.uiuc.edu" target="_blank" class="">llvmdev@cs.uiuc.edu</a>><br class=""><br class=""><br class=""><div dir="ltr" class=""><div class="">The isel logs are exactly the same, nothing changed, it's matching the same instructions just the reg classes are different.</div><div class=""><br class=""></div><div class="">Where in the SelectionDAG is the code that adds an extra MI COPY? I'll have to set a breakpoint and debug backwards from there to see what's going on. It's only happening with the GPRRegs class, for example if I use another reg class instead along with the base regs than it matches the base reg just fine, it's like GPR is overriding any other reg class matching.</div><div class=""><br class=""></div><div class="">Thanks.</div></div><div class=""><div class=""><div class="gmail_extra"><br class=""><div class="gmail_quote">On Fri, Jul 31, 2015 at 1:21 PM, Quentin Colombet <span dir="ltr" class=""><<a href="mailto:qcolombet@apple.com" target="_blank" class="">qcolombet@apple.com</a>></span> wrote:<br class=""><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div style="word-wrap:break-word" class=""><br class=""><div class=""><span class=""><blockquote type="cite" class=""><div class="">On Jul 31, 2015, at 10:14 AM, Ryan Taylor <<a href="mailto:ryta1203@gmail.com" target="_blank" class="">ryta1203@gmail.com</a>> wrote:</div><br class=""><div class=""><div dir="ltr" class=""><div class="">Quentin,</div><div class=""><br class=""></div><div class=""> It's in the instruction selection, sorry I forgot to mention that. The Vreg class is GPR and an extra COPY is generated to copy from the GPR to the Base Reg, even though my 'mov' instruction has Base in the Register class list.</div></div></div></blockquote><div class=""><br class=""></div></span><div class="">Then, I suggest you use -debug-only=isel to check what changed in your selection instruction process. I do not see off-hand what could have caused.</div><div class=""><br class=""></div><div class="">Sorry for not being more helpful here.</div><span class=""><font color="#888888" class=""><div class=""><br class=""></div><div class="">Q.</div></font></span><div class=""><div class=""><br class=""><blockquote type="cite" class=""><div class=""><div dir="ltr" class=""><div class=""><br class=""></div></div><div class="gmail_extra"><br class=""><div class="gmail_quote">On Fri, Jul 31, 2015 at 12:50 PM, Quentin Colombet <span dir="ltr" class=""><<a href="mailto:qcolombet@apple.com" target="_blank" class="">qcolombet@apple.com</a>></span> wrote:<br class=""><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hi Ryan,<br class="">
<br class="">
Could you check where those moves come from?<br class="">
<br class="">
In particular, is this the product of the instruction selection process?<br class="">
<br class="">
You use -print-machineinstrs to see when it is inserted.<br class="">
<br class="">
Thanks,<br class="">
-Quentin<br class="">
<div class=""><div class=""><br class="">
> On Jul 30, 2015, at 2:02 PM, Ryan Taylor <<a href="mailto:ryta1203@gmail.com" target="_blank" class="">ryta1203@gmail.com</a>> wrote:<br class="">
><br class="">
> In LLVM 3.6,<br class="">
><br class="">
> We have an instruction that uses a register class that is defined of several different reg classes. In 3.4 this works fine but in 3.6 this is broken.<br class="">
><br class="">
> For example, I have a mov instruction. mov can be executed between different register types (ie gpr, index, base, etc..)<br class="">
><br class="">
> In 3.4, we would get something like this:<br class="">
><br class="">
> mov @a, %b1 // moving this immediate to a base register, which is what we want<br class="">
><br class="">
> In 3.6, we now get this:<br class="">
><br class="">
> mov @a, %r0 // r0 = gpr<br class="">
> mov %r0, %b1 // b1 = base reg<br class="">
><br class="">
> The register class looks like this:<br class="">
><br class="">
> def ARegs : RegisterClass<"us", [i16], i16, (add GPRRegs, IndexRegs, BaseRegs)>;<br class="">
><br class="">
> I have absolutely no idea why this is not matching any longer?<br class="">
><br class="">
> The fix here is to define an MI with explicit single register class (ie it only allows PTRRegs as the destination).<br class="">
><br class="">
> This must be an issue with something else and not the tablegen but if that was the case I'm not sure. Anyway help would be great, what should I be looking at here?<br class="">
><br class="">
> Thanks.<br class="">
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