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<div class="moz-cite-prefix">Dear All,<br>
<br>
To add to this, you can find examples of inserting NOPs for X86 in
the CFI pass originally written at Lehigh University that we
ported to 64-bit X86 for SVA:<br>
<br>
<a class="moz-txt-link-freetext" href="https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_jtcriswell_SVA_blob_master_llvm_lib_Target_X86_X86CFIOptPass.cpp&d=AwMD-g&c=8hUWFZcy2Z-Za5rBPlktOQ&r=Mfk2qtn1LTDThVkh6-oGglNfMADXfJdty4_bhmuhMHA&m=6-jWlIN8gG2Q7bM6HyubM3TvWvaPZsgIAWPLRq6w9BI&s=WlptokMMzAmrkpj8cI0Z9vDiwsHRYHapnbdn81HPlwg&e=">https://github.com/jtcriswell/SVA/blob/master/llvm/lib/Target/X86/X86CFIOptPass.cpp</a><br>
<br>
Alternatively, you could use an InlineAsm call at the LLVM IR
level (which I think would be easier to implement).<br>
<br>
Regards,<br>
<br>
John Criswell<br>
<br>
On 7/9/15 8:56 AM, Daniel Sanders wrote:<br>
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<p class="MsoNormal"><span>Hi,</span></p>
<p class="MsoNormal"><span> </span></p>
<p class="MsoNormal"><span>Given that you are using LLVM-IR, I
expect that instruction selection occurs after your pass and
instruction selection also applies optimizations. In
particular, when the SelectionDAG is built it will eliminate
(via constant folding) the '%nop = add i1 0, 0' you added to
the LLVM-IR.</span></p>
<p class="MsoNormal"><span> </span></p>
<p class="MsoNormal"><span>If you are trying to insert nop's
into the resulting assembly then you should probably be
trying to insert them at a very late stage of the backend
instead. Different IR's based on MachineInstr and MCInst are
used in these later stages.</span></p>
<p class="MsoNormal"><span> </span></p>
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<div>
<p class="MsoNormal"><b><span lang="EN-US">From:</span></b><span
lang="EN-US"> <a class="moz-txt-link-abbreviated" href="mailto:llvmdev-bounces@cs.uiuc.edu">llvmdev-bounces@cs.uiuc.edu</a>
[<a class="moz-txt-link-freetext" href="mailto:llvmdev-bounces@cs.uiuc.edu">mailto:llvmdev-bounces@cs.uiuc.edu</a>]
<b>On Behalf Of </b>Zahra Marj<br>
<b>Sent:</b> 09 July 2015 12:33<br>
<b>To:</b> David Chisnall<br>
<b>Cc:</b> LLVM Developers Mailing List<br>
<b>Subject:</b> Re: [LLVMdev] insert nop instruction</span></p>
</div>
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<p class="MsoNormal"> </p>
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<p class="MsoNormal"><span>My pass runs after optimization
passes.</span></p>
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<p class="MsoNormal"> </p>
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<p class="MsoNormal">On Thu, Jul 9, 2015 at 1:11 PM, David
Chisnall <<a moz-do-not-send="true" href="mailto:David.Chisnall@cl.cam.ac.uk" target="_blank">David.Chisnall@cl.cam.ac.uk</a>>
wrote:</p>
<p class="MsoNormal">Hi,<br>
<br>
What are you trying to achieve? Inserting NOPs into
LLVM IR is likely to be pointless, as optimisations (in
the IR or SelectionDAG) will remove them before machine
code generation. If you want to insert NOPs into the
generated machine code, then this will not help you (you
could insert inline assembly containing nops into the
IR).<br>
<br>
David</p>
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<p class="MsoNormal"><br>
> On 9 Jul 2015, at 09:25, Zahra Marj <<a moz-do-not-send="true" href="mailto:zahrafatehimarj@gmail.com">zahrafatehimarj@gmail.com</a>>
wrote:<br>
><br>
> Hi.<br>
> I need to write a function pass that insert nop
instruction in function. Examples of these
instructions are: %nop = add i1 0, 0 or %nop =
alloca i1, i1 0. This link couldn't help me:
<a moz-do-not-send="true" href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_docs_ProgrammersManual.html-23creating-2Dand-2Dinserting-2Dnew-2Dinstructions&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=Mfk2qtn1LTDThVkh6-oGglNfMADXfJdty4_bhmuhMHA&m=Qp9GWIWeL3Bal7o2P67hp2QbDCZLKBcsuzuT3xzMMUo&s=GZrVdTwGMs5jykSuspIi7GRCIni6kaJDICG65OxeZMc&e=" target="_blank">
http://llvm.org/docs/ProgrammersManual.html#creating-and-inserting-new-instructions</a><br>
> I need a clear example about inserting new
instruction. Anyone can help me?<br>
> Thanks.</p>
</div>
</div>
<p class="MsoNormal">>
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<pre class="moz-signature" cols="72">--
John Criswell
Assistant Professor
Department of Computer Science, University of Rochester
<a class="moz-txt-link-freetext" href="https://urldefense.proofpoint.com/v2/url?u=http-3A__www.cs.rochester.edu_u_criswell&d=AwMD-g&c=8hUWFZcy2Z-Za5rBPlktOQ&r=Mfk2qtn1LTDThVkh6-oGglNfMADXfJdty4_bhmuhMHA&m=6-jWlIN8gG2Q7bM6HyubM3TvWvaPZsgIAWPLRq6w9BI&s=bAx1vh8tE16-Vk4QhQJ0bapJ6yDqgrQHrsV4DCmuaNc&e=">http://www.cs.rochester.edu/u/criswell</a></pre>
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