<html><head><meta http-equiv="Content-Type" content="text/html charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Hi Tyro,<div class=""><br class=""><div><blockquote type="cite" class=""><div class="">On Jun 23, 2015, at 3:33 AM, Tyro Software <<a href="mailto:softwaretyro@gmail.com" class="">softwaretyro@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class=""><div class="">With a "toy" target with non-homogeneous register banks and specific instructions for copying or summing values between them (remotely similar to a 6502 but with multiple acculmulators and indexes), I'm trying to restrict instruction selection by the register class. However given these (simplified extracts) from the .td definitions:</div><div class=""><br class=""></div><div class=""><div class="">def aRegs : RegisterClass<"ToyCPU", [i8], 8,</div><div class=""> (add a0, a1, a2, a3 )>;</div></div><div class=""><br class=""></div><div class=""><div class=""><div class="">def xRegs : RegisterClass<"ToyCPU", [i8], 8,</div><div class=""> (add x0, x1, x2, x3, x4, x5, x6, x7 )>;</div></div></div><div class=""><br class=""></div><div class=""><div class="">// Add an index to an accumulator </div><div class="">// (aN = aN + xO => "ADX aN, xO")</div><div class="">let Constraints = "$src = $dst" in {</div><div class=""> def ADX : ToyInst<0x0600, //opcode</div><div class=""> (outs aRegs:$dst), (ins aRegs:$src, xRegs:$src2),</div><div class=""> "adx {$dst, $src2}",</div><div class=""> [(set aRegs:$dst, (add aRegs:$src xRegs:$src2))]>;</div><div class="">}</div><div class=""><br class=""></div></div><div class="">it seemingly ignores the register class, emitting assembler such as "adx a1, a0”. </div></div></div></blockquote><div><br class=""></div><div>If you’re emitting this, it looks like to me you have a pattern that allow to produce those or your asm printer is not printing the xRegs correctly.</div><div><br class=""></div><div>Could you check the output of (-mllvm) -print-machineinstrs?</div><div><br class=""></div><div>After register selection, if you grabbed the right ADX, you should see ADX … ; vregDst:aRegs, vregSrc:aRegs, vregSrc2:xRegs. If that is not the case, your not selection the right thing.</div><br class=""><blockquote type="cite" class=""><div class=""><div dir="ltr" class=""><div class=""><br class=""></div><div class="">The only direct commentary that I've found is this thread:</div><div class=""><br class=""></div><div class=""><a href="http://lists.cs.uiuc.edu/pipermail/llvmdev/2007-September/010815.html" target="_blank" class="">http://lists.cs.uiuc.edu/pipermail/llvmdev/2007-September/010815.html</a><br class=""></div><div class=""><br class=""></div><div class="">which (as I understand) says that register class constraints can only be handled through custom pattern code. Before heading in that direction I'd welcome confirmation that - eight years after that thread - this remains the best approach for restricting register selections?</div></div></div></blockquote><div><br class=""></div><div>What are you trying to achieve with this restricted instruction selection by register class?</div><div><br class=""></div><div>Cheers,</div><div>-Quentin</div><br class=""><blockquote type="cite" class=""><div class=""><div dir="ltr" class=""><div class=""><br class=""></div><div class="">/Tyro</div></div>
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