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<div class="moz-cite-prefix">On 07/01/2015 02:06 PM, Xiaochu Liu
wrote:<br>
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<div dir="ltr">I was trying to do a pattern matching for a rd+imm
instruction in my own backend.
<div>It looks something like:</div>
<div>def: Pat<build_vector v2i16:$src1, v2i16:$src2, (OR
(SLLI GPR: $src1,16), GPR:$src2>;</div>
<div>OR takes two i32 in registers and SLLI takes one i32 in
registers and an immediate.</div>
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<div>But the immediate '16' does not work here and I tried
different ways. May I know if any of you have any idea how to
bake an immediate value (16) into the tablegen?</div>
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How specifically doesn't it work / what is the error? What version
of LLVM are you using?How are SLLI's operands defined?<br>
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