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<div class="moz-cite-prefix">On 06/04/2015 07:35 PM, Christos
Margiolas wrote:<br>
</div>
<blockquote
cite="mid:CAC3KUCx0mpBrnrGjDVxQzxtBpnJXtw3herZ_E2pQoSqSyMNsKA@mail.gmail.com"
type="cite">
<div dir="ltr"><span style="font-size:12.8000001907349px">Hello
All,</span>
<div style="font-size:12.8000001907349px"><br>
</div>
<div style="font-size:12.8000001907349px">The last two months I
have been working on the design and implementation of a
heterogeneous execution engine for LLVM. I started this
project as an intern at the Qualcomm Innovation Center and I
believe it can be useful to different people and use cases. I
am planning to share more details and a set of patches in the
next </div>
<div style="font-size:12.8000001907349px">days. However, I would
first like to see if there is an interest for this. </div>
<div style="font-size:12.8000001907349px"><br>
</div>
<div style="font-size:12.8000001907349px">The project is about
providing compiler and runtime support for the automatic and
transparent offloading of loop or function workloads to
accelerators. </div>
<div style="font-size:12.8000001907349px"><br>
</div>
<div style="font-size:12.8000001907349px"><span
style="font-size:12.8000001907349px">It is composed of the
following:</span></div>
<div style="font-size:12.8000001907349px"><span
style="font-size:12.8000001907349px">a) Compiler and
Transformation Passes for extracting loops or functions for
offloading.</span><br>
</div>
</div>
</blockquote>
This sounds really cool. I'm thinking about FPGA offloading.<br>
<br>
-Rich<br>
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