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<div class="moz-cite-prefix">On 4/22/15 2:53 AM, Eric Lu wrote:<br>
</div>
<blockquote
cite="mid:CAOVMOinef-rw7_=d__9GpMn1JTHudmiYhjPssJcHkMy4H7oUCA@mail.gmail.com"
type="cite">
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<div dir="ltr">Hey, Daniel
<div><br>
</div>
<div> Is it better to instrument in the CodeGen phase ? I am
now doing it in the opt phases, and it seems a little complex
when instrument phi nodes, because I have to decide where the
load operation should be if there are no phi nodes.</div>
<div><br>
</div>
<div>%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next,
%for.body ]<br>
</div>
<div><br>
</div>
<div>It may load 0 or %indvars.iv.next, I have to add
checkLoad(addr, size) in different BBs for different incoming
value.</div>
</div>
</blockquote>
<br>
Eric, I think you might be confusing people with your use of the
term "load." In LLVM parlance, "load" means an LLVM load
instruction. When an instruction (such as a phi node) uses an SSA
register as an operand, we don't say that it "loads" the value from
the SSA register; we say that it "reads" the value of the SSA
register. Only the LLVM load instruction "loads" values. The
reasoning for this is that SSA registers may be assigned to stack
spill slots or to registers, depending upon what the code generator
decides.<br>
<br>
Getting back to your question, it is not clear what you want to do
or why you want to do it. If you want to add a call to checkLoad()
prior to every memory access that does a read, then all you need to
do is to look for all the instructions that read memory (the LLVM
load instruction, the atomic instructions, and a few intrinsics like
llvm.memcpy()) and insert your call before those instructions. That
will allow you to instrument all memory accesses that read memory
that are visible at the LLVM IR level.<br>
<br>
Now, if you want to instrument memory accesses that are *not*
visible at the LLVM IR level (e.g., reads to stack spill slots,
pushing parameters on the stack for function calls, etc.), then you
need to instrument at the MachineInstr level. These memory access
instructions are not visible in the LLVM IR.<br>
<br>
Hope this helps,<br>
<br>
John Criswell<br>
<br>
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cite="mid:CAOVMOinef-rw7_=d__9GpMn1JTHudmiYhjPssJcHkMy4H7oUCA@mail.gmail.com"
type="cite">
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<div>I guess in CodeGen Phase, the code have been changed back
to code with load/store already.</div>
<div><br>
</div>
<div>Are there examples to show me how to instrument in the
CodeGen Phase? </div>
</div>
<div class="gmail_extra"><br>
<div class="gmail_quote">On Wed, Apr 22, 2015 at 1:23 PM, Daniel
Berlin <span dir="ltr"><<a moz-do-not-send="true"
href="mailto:dberlin@dberlin.org" target="_blank">dberlin@dberlin.org</a>></span>
wrote:<br>
<blockquote class="gmail_quote">reg2mem does not eliminate phi
nodes the way codegen does, it just<br>
converts ssa values to non-ssa values.<br>
<br>
It's not the same thing.<br>
<div class="HOEnZb">
<div class="h5"><br>
<br>
On Tue, Apr 21, 2015 at 10:14 PM, Eric Lu <<a
moz-do-not-send="true"
href="mailto:eirc.lew@gmail.com">eirc.lew@gmail.com</a>>
wrote:<br>
> By the way. When I remove these phi nodes with
-reg2mem, some new load<br>
> operations will be inserted, but when I try cache
load operations with:<br>
> visitFunction<br>
> visitLoadInst<br>
> It seems we can't see these new load operations.<br>
><br>
> On Wed, Apr 22, 2015 at 1:10 PM, Eric Lu <<a
moz-do-not-send="true"
href="mailto:eirc.lew@gmail.com">eirc.lew@gmail.com</a>>
wrote:<br>
>><br>
>> Hi, Daniel<br>
>><br>
>> I want to profile load/store operations, in
order to reduce the overhead<br>
>> of profiling, I try to instrument the optimized
llvm ir, which has phi<br>
>> nodes.<br>
>><br>
>> BTW, when the value of some load/store
operations may have multi-source,<br>
>> then the load will be translated into phi
nodes, and all phi nodes are<br>
>> placed in the front of BB. Sometimes, the
position is not where the load<br>
>> happens, is there any way to figure out where
the load should be placed?( If<br>
>> the phi node translated back to load
operations)<br>
>><br>
>> Best Regards!<br>
>> Eric Lew<br>
>><br>
>> On 周三, 4月 22, 2015 at 12:24 下午, Daniel Berlin
<<a moz-do-not-send="true"
href="mailto:dberlin@dberlin.org">dberlin@dberlin.org</a>>
wrote:<br>
>><br>
>> Hey Eric,<br>
>> phi nodes don't exist for real, so you can't.<br>
>> The are removed by PHI elimination as part of
codegen.<br>
>><br>
>> What are you trying to achieve?<br>
>><br>
>><br>
>><br>
>><br>
>> On Tue, Apr 21, 2015 at 9:12 PM, Eric Lu <<a
moz-do-not-send="true"
href="mailto:eirc.lew@gmail.com">eirc.lew@gmail.com</a>>
wrote:<br>
>> > Hi, all<br>
>> ><br>
>> > When compiling a program with -g -O0,
and if we have a PC, then with<br>
>> > addr2line, we can get the line number of
the instruction.<br>
>> ><br>
>> > My quesions are: what is the result of
Phi node instruction, can we get<br>
>> > the<br>
>> > similar results ?<br>
>> ><br>
>> > --<br>
>> > Best Regards!<br>
>> > Eric Lew<br>
>> ><br>
>> >
_______________________________________________<br>
>> > LLVM Developers mailing list<br>
>> > <a moz-do-not-send="true"
href="mailto:LLVMdev@cs.uiuc.edu">LLVMdev@cs.uiuc.edu</a>
<a moz-do-not-send="true"
href="http://llvm.cs.uiuc.edu" target="_blank">http://llvm.cs.uiuc.edu</a><br>
>> > <a moz-do-not-send="true"
href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev"
target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br>
>> ><br>
><br>
><br>
><br>
><br>
> --<br>
> Best Regards!<br>
> Eric Lew<br>
</div>
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<br>
<br>
<div><br>
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-- <br>
<div class="gmail_signature">Best Regards!<br>
Eric Lew</div>
</div>
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<br>
<pre class="moz-signature" cols="72">--
John Criswell
Assistant Professor
Department of Computer Science, University of Rochester
<a class="moz-txt-link-freetext" href="http://www.cs.rochester.edu/u/criswell">http://www.cs.rochester.edu/u/criswell</a></pre>
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