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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link="#0563C1" vlink="#954F72"><div class=WordSection1><p class=MsoNormal><span style='color:#1F497D'>One possibility for which we’d be interested in getting feedback is allowing a target to fully handle the parsing process.<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='color:#1F497D'>We have a generated parser that can output other compiler IRs and this could be changed to output MCInsts. If we could get the input text stream and an output MC stream we could have a target specific way of doing all parsing. Perhaps this would be useful to other targets that have difficulty?<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='color:#1F497D'>A parser generator isn’t distributed with the project so we could publish the parser generator input and output.<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'><o:p> </o:p></span></p><div><div style='border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in'><p class=MsoNormal><b>From:</b> llvmdev-bounces@cs.uiuc.edu [mailto:llvmdev-bounces@cs.uiuc.edu] <b>On Behalf Of </b>Colin LeMahieu<br><b>Sent:</b> Tuesday, April 14, 2015 12:59 PM<br><b>To:</b> 'LLVM Developers Mailing List'<br><b>Subject:</b> [LLVMdev] RFC building a target MCAsmParser<o:p></o:p></p></div></div><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Hi everyone. We’re interested in contributing a Hexagon assembler to MC and we’re looking for comments on a good way to integrate the grammar in to the infrastructure.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>We rely on having a robust assembler because we have a large base of developers that write in assembly due to low power requirements for mobile devices. We put in some C-like concepts to make the syntax easier and this design is fairly well received by users.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>The following is a list of grammar snippets we’ve had trouble integrating in to the asm parser framework.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Instruction packets are optionally enclosed in braces.<o:p></o:p></p><p class=MsoNormal> { r0 = add(r1, r2) r1 = add(r2, r0) }<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Register can be the beginning of a statement. Register transfers have no mnemonic.<o:p></o:p></p><p class=MsoNormal> r0 = r1<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Double registers have a colon in the middle which can look like a label<o:p></o:p></p><p class=MsoNormal> r1:0 = add(r3:2, r5:4)<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Predicated variants for many instructions<o:p></o:p></p><p class=MsoNormal> if(p1) r0 = add(r1, r2)<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Dense semantics for DSP applications. Complex multiply optionally shifting result left by 1 with optional rounding and optional saturation<o:p></o:p></p><p class=MsoNormal> r0 = cmpy(r1, r2):<<1:rnd:sat<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Hardware loops ended by optional packet suffix<o:p></o:p></p><p class=MsoNormal> { r0 = r1 }:endloop0:endloop1<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>We found the Hexagon grammar to be straight forward to implement using plain lex / parse but harder within the MCTargetAsmParser. <o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>We were thinking a way to get the grammar to work would involve modifying tablegen and the main asm parser loop. We’d have to make tablegen break down each instructions in to a sequence of tokens and build a sorted matching table based on the set of these sequences. The matching loop would bisect this sorted list looking for a match. We think existing grammars would be unaffected; all existing instructions start with a mnemonic so their first token would be an identifier followed by the same sequence of tokens they currently have.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Let us know if we’re likely to run in to any issues making these changes or if there are other recommendations on what we could do. Thanks!<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal><span style='color:black'>Qualcomm Innovation Center, Inc.</span><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'><br></span><span style='color:black'>The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, </span><span style='font-size:10.0pt;font-family:"Tahoma",sans-serif;color:black'><br></span><span style='color:black'>a Linux Foundation Collaborative Project</span><o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p></div></body></html>