<div dir="ltr">I see. My CPU is a general Core i7 Ivy bridge CPU. </div><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Apr 10, 2015 at 6:48 PM, Bruce Hoult <span dir="ltr"><<a href="mailto:bruce@hoult.org" target="_blank">bruce@hoult.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div>I suppose that depends on your CPU. Do you even have a CPU that supports operations on <N x i1> as packed bits in vector registers?</div><div><br></div></div><div class="HOEnZb"><div class="h5"><div class="gmail_extra"><br><div class="gmail_quote">On Sat, Apr 11, 2015 at 12:43 PM, zhi chen <span dir="ltr"><<a href="mailto:zchenhn@gmail.com" target="_blank">zchenhn@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Yes, but my point is that there would be some overhead to do cast the <N x i1> vectortype to an integerNty. Is there any good way to check not all of these N bits in the vectortype are 0s?</div><div><div><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Apr 10, 2015 at 5:37 PM, Bruce Hoult <span dir="ltr"><<a href="mailto:bruce@hoult.org" target="_blank">bruce@hoult.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Sure, if you actually just want an i1 saying whether or not at least one bit is set to 1, then comparing against 0 is the right thing.<div><br></div><div>That should end up generating a unary TST instruction on ISAs that have one.</div></div><div class="gmail_extra"><br><div class="gmail_quote"><div><div>On Sat, Apr 11, 2015 at 12:29 PM, zhi chen <span dir="ltr"><<a href="mailto:zchenhn@gmail.com" target="_blank">zchenhn@gmail.com</a>></span> wrote:<br></div></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div><div dir="ltr">Thanks, Bruce. So, what is the easiest way to check if there is any bit set to 1 in a <N x i1> vector type? I used bitcast instruction to cast it into "iN" first and them compare iN to 0. Do you have a better way to do it? Thanks again.</div><div><div><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Apr 10, 2015 at 5:22 PM, Bruce Hoult <span dir="ltr"><<a href="mailto:bruce@hoult.org" target="_blank">bruce@hoult.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">LLVM doesn't have a "logical neg" (or "not") operator. That's a C thing. Do a compare against 0 to create an i1 result, then zero extend the i1 to the size of integer result you want.<div><br></div></div><div class="gmail_extra"><br><div class="gmail_quote"><div><div>On Sat, Apr 11, 2015 at 12:07 PM, zhi chen <span dir="ltr"><<a href="mailto:zchenhn@gmail.com" target="_blank">zchenhn@gmail.com</a>></span> wrote:<br></div></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div><div dir="ltr"><p style="margin:0px 0px 1em;padding:0px;border:0px;font-size:15px;clear:both;font-family:'Helvetica Neue',Helvetica,Arial,sans-serif;line-height:19.5px">How can I generate LLVM IR for both logical NEG (!)? For example, if I have Int32Ty a,</p><p style="margin:0px 0px 1em;padding:0px;border:0px;font-size:15px;clear:both;font-family:'Helvetica Neue',Helvetica,Arial,sans-serif;line-height:19.5px">For the bitwise NEG(~):</p><pre style="margin-top:0px;padding:5px;border:0px;font-size:13px;overflow:auto;width:auto;max-height:600px;font-family:Consolas,Menlo,Monaco,'Lucida Console','Liberation Mono','DejaVu Sans Mono','Bitstream Vera Sans Mono','Courier New',monospace,sans-serif;word-wrap:normal;background-color:rgb(238,238,238)"><code style="margin:0px;padding:0px;border:0px;font-family:Consolas,Menlo,Monaco,'Lucida Console','Liberation Mono','DejaVu Sans Mono','Bitstream Vera Sans Mono','Courier New',monospace,sans-serif;white-space:inherit">c = ~a ;
</code></pre><p style="margin:0px 0px 1em;padding:0px;border:0px;font-size:15px;clear:both;font-family:'Helvetica Neue',Helvetica,Arial,sans-serif;line-height:19.5px">I can use the following API from LLVM:</p><pre style="margin-top:0px;padding:5px;border:0px;font-size:13px;overflow:auto;width:auto;max-height:600px;font-family:Consolas,Menlo,Monaco,'Lucida Console','Liberation Mono','DejaVu Sans Mono','Bitstream Vera Sans Mono','Courier New',monospace,sans-serif;word-wrap:normal;background-color:rgb(238,238,238)"><code style="margin:0px;padding:0px;border:0px;font-family:Consolas,Menlo,Monaco,'Lucida Console','Liberation Mono','DejaVu Sans Mono','Bitstream Vera Sans Mono','Courier New',monospace,sans-serif;white-space:inherit">BinaryOperator *neg = BinaryOperator::CreateNeg(nbits, "bitwiseNEG", insertBefore);
</code></pre><p style="margin:0px 0px 1em;padding:0px;border:0px;font-size:15px;clear:both;font-family:'Helvetica Neue',Helvetica,Arial,sans-serif;line-height:19.5px">How, if I want to generate logical NEG:</p><pre style="margin-top:0px;padding:5px;border:0px;font-size:13px;overflow:auto;width:auto;max-height:600px;font-family:Consolas,Menlo,Monaco,'Lucida Console','Liberation Mono','DejaVu Sans Mono','Bitstream Vera Sans Mono','Courier New',monospace,sans-serif;word-wrap:normal;background-color:rgb(238,238,238)"><code style="margin:0px;padding:0px;border:0px;font-family:Consolas,Menlo,Monaco,'Lucida Console','Liberation Mono','DejaVu Sans Mono','Bitstream Vera Sans Mono','Courier New',monospace,sans-serif;white-space:inherit">c = !a;
</code></pre><p style="margin:0px 0px 1em;padding:0px;border:0px;font-size:15px;clear:both;font-family:'Helvetica Neue',Helvetica,Arial,sans-serif;line-height:19.5px">what should I do for this?</p><p style="margin:0px 0px 1em;padding:0px;border:0px;font-size:15px;clear:both;font-family:'Helvetica Neue',Helvetica,Arial,sans-serif;line-height:19.5px">Thanks</p></div>
<br></div></div>_______________________________________________<br>
LLVM Developers mailing list<br>
<a href="mailto:LLVMdev@cs.uiuc.edu" target="_blank">LLVMdev@cs.uiuc.edu</a> <a href="http://llvm.cs.uiuc.edu" target="_blank">http://llvm.cs.uiuc.edu</a><br>
<a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br>
<br></blockquote></div><br></div>
</blockquote></div><br></div>
<br></div></div></div></div><span><font color="#888888"><span><font color="#888888">--
<br>This message has been scanned for viruses and
<br>dangerous content by
<a href="http://www.mailscanner.info/" target="_blank"><b>MailScanner</b></a>, and is
<br>believed to be clean.
</font></span></font></span></blockquote></div><br></div>
</blockquote></div><br></div>
<br>--
<br>This message has been scanned for viruses and
<br>dangerous content by
<a href="http://www.mailscanner.info/" target="_blank"><b>MailScanner</b></a>, and is
<br>believed to be clean.
</div></div></blockquote></div><br></div>
</div></div></blockquote></div><br></div>