<html><head><meta http-equiv="Content-Type" content="text/html charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Hi James,<div class=""><br class=""></div><div class="">I’m not too familiar with Sparc’s design here, but you may find it useful to have a look at how the ARM target deals with this sort of thing. In particular, the load/store optimization pass which can form the LDRD/STRD instructions among other things.</div><div class=""><br class=""></div><div class="">-Jim</div><div class=""><br class=""><div><blockquote type="cite" class=""><div class="">On Apr 2, 2015, at 11:43 AM, James Y Knight <<a href="mailto:jyknight@google.com" class="">jyknight@google.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class="">In <a href="http://reviews.llvm.org/D8713" class="">http://reviews.llvm.org/D8713</a>, I added the 64bit integer store ("std") and load ("ldd") instructions for 32bit sparc. But now I need codegen to know how to emit them, and am not sure the best way to go about teaching the backend that 64bit integers can be used natively, but only for loads and stores.<div class=""><br class=""><div class="">(I originally wrote an earlier draft of question in the review but it seems like it may be better on the dev list, since it's more what to do next than what was done.)<div class=""><br class=""></div><div class="">Basically, I'd like it if C code like:<br class=""></div><div class=""><div class=""> long long x,y;</div><div class=""> void f() { y = x; }</div><div class="">Or equivalently, the ll code</div><div class=""><div class=""> %0 = load i64, i64* @x, align 8</div><div class=""> store i64 %0, i64* @y, align 8</div></div><div class="">turned into just "ldd, std" instructions, as it does in GCC, rather than loading and storing the two 32bit halves of the variables separately.</div><div class=""><br class=""></div><div class="">To allow that, I tried adding:</div><div class=""> addRegisterClass(MVT::i64, &SP::IntPairRegClass)</div><div class="">to SparcTargetLowering::SparcTargetLowering in 32bit mode.</div><div class=""><br class=""></div><div class="">Doing that then makes load/store work. But it causes llvm to try to use i64 operations for *everything*, which of course fails for all other operations, since there's no such instruction pattern for them.</div><div class=""><br class=""></div><div class="">Okay, so I then try setting all the operations to "Expand" via:</div><div class=""><div class=""> for (unsigned Op = 0; Op < ISD::BUILTIN_OP_END; ++Op) {</div><div class=""> setOperationAction(Op, MVT::i64, Expand);</div><div class=""> }</div></div><div class=""><br class=""></div><div class="">This does not actually work properly. E.g.<br class=""></div><div class=""><div class=""> %res = add nsw i64 %0, 3</div></div><div class="">gives an error:</div><div class=""><div class=""> LLVM ERROR: Cannot select: 0x43b1df0: i64 = add 0x43b1bd0, 0x43b1ce0 [ORD=3] [ID=15]</div><div class="">...<br class=""></div></div><div class="">Which seems odd -- it appears as if it ignored the Expand and just tried to continue onto selection for 64bit add as if it had been legal?<br class=""><br class=""></div><div class="">And a different example:</div><div class=""> %res = shl i64 %0, 1</div><div class=""><div class="">aborts with error:</div><div class=""> llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:3988: void {anonymous}::SelectionDAGLegalize::ExpandNode(llvm::SDNode*): Assertion `VT.isVector() && "Unable to legalize non-vector shift"' failed.</div></div><div class=""><br class=""></div><div class="">So, it seems to me that a whole bunch of other code will need to be added or modified, too, to teach LLVM how to expand i64 to i32 operations for everything other than load/store, if I continue down this path -- despite that it can do so just fine if i64 doesn't have a register class. This seems ugly...</div><div class=""><br class=""></div><div class="">Is there some other better way to notate the case that ONLY loads/stores can be done on 64bit integers, but that everything else must be done as if 64bit integers didn't exist?</div></div></div></div><div class=""><br class=""></div></div>
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