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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">Hi,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif""><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">You are currently printing LLVM's internal register numbers rather than the target register numbers. If you look at lib/Target/Mips/MipsGenRegisterInfo.inc (a generated file
in your build directory), you should see that the numbers correspond to an enum value near the start of the file. In my build, MipsGenRegisterInfo.inc contains:<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Courier New""> namespace mips<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Courier New""> enum {<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Courier New""> ...<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Courier New""> V1 = 290,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Courier New""> ...<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Courier New""> };<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Courier New""> }<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">V1 is another name for $3, so 290 is the correct register number for $3. You need to pass this number to MipsInstPrinter::getRegisterName() to get the name used in assembly
but note that this is a many-to-one mapping. Both V0 and V0_64 will produce $3. Similarly F0, F0_HI, D0, and D0_64 will all produce $f0.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif""><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">The internal register numbers are different from the target register numbers because it is important to keep track of how registers overlap with each other. For example,
F0, F0_HI, D0, and D0_64 are all printed as $f0, but they have different uses:<o:p></o:p></span></p>
<p class="MsoListParagraph" style="text-indent:-18.0pt;mso-list:l0 level1 lfo1"><![if !supportLists]><span style="font-size:11.0pt;font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">F0 is a 32-bit floating point value.<o:p></o:p></span></p>
<p class="MsoListParagraph" style="text-indent:-18.0pt;mso-list:l0 level1 lfo1"><![if !supportLists]><span style="font-size:11.0pt;font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">D0 is a 64-bit floating point value that overlaps with F0 and F1. It's only used for 32-bit FPU's.<o:p></o:p></span></p>
<p class="MsoListParagraph" style="text-indent:-18.0pt;mso-list:l0 level1 lfo1"><![if !supportLists]><span style="font-size:11.0pt;font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">F0_HI the top 32-bits of a 64-bit floating point value. It's only used for 64-bit FPU's.<o:p></o:p></span></p>
<p class="MsoListParagraph" style="text-indent:-18.0pt;mso-list:l0 level1 lfo1"><![if !supportLists]><span style="font-size:11.0pt;font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">D0_64 is a 64-bit value that overlaps with F0, and F0_HI. It's only used for 64-bit FPU's.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif""><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">Hope that helps.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif""><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> llvmdev-bounces@cs.uiuc.edu [mailto:llvmdev-bounces@cs.uiuc.edu]
<b>On Behalf Of </b>Ambuj Agrawal<br>
<b>Sent:</b> 28 February 2015 16:33<br>
<b>To:</b> Quentin Colombet<br>
<b>Cc:</b> john.spelis@bluwirelesstechnology.com; llvmdev@cs.uiuc.edu<br>
<b>Subject:</b> Re: [LLVMdev] LLVM register number for MIPS DAGToDAG<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Thanks for your reply Quentin. I do understand that the registers are allocated much later in the pipeline.
<o:p></o:p></p>
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<p class="MsoNormal">I am assuming that the physical registers are allocated before MipsAsmPrinter class.
<o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">I am doing something like <br>
if (MI->getOpcode() == Mips::OPCODE) {<br>
unsigned n = MI->getNumOperands(); <br>
for(unsigned i=0 ; i < n ; i++) {<br>
const MachineOperand &MO = MI->getOperand(i);<br>
if (MO.isReg())<br>
{ <br>
fprintf(stderr,"int i is %u and reg is %d\n",i, MO.getReg());<br>
}<br>
}<br>
} <o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">but I am still getting wrong physical register number.
<o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">For eg when the allocated register is 3 in assembly the output given by MO.getReg() is 290.<o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">Any clues why is this the case?<o:p></o:p></p>
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<p class="MsoNormal">Thanks,<o:p></o:p></p>
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<p class="MsoNormal">Ambuj<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">On Fri, Feb 27, 2015 at 5:46 PM, Quentin Colombet <<a href="mailto:qcolombet@apple.com" target="_blank">qcolombet@apple.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt"><br>
> On Feb 27, 2015, at 1:59 AM, Ambuj Agrawal <<a href="mailto:ambujbwt@gmail.com">ambujbwt@gmail.com</a>> wrote:<br>
><br>
> Is it possible to get a register number to which the value is allocated to in MIPS in DAGToDAG class?<br>
><br>
> More Specifically:<br>
> SDValue Reg3 = Node->getOperand(3);<br>
> if (RegisterSDNode *R = dyn_cast<RegisterSDNode>(Reg3))<br>
> {<br>
> op3 = cast<RegisterSDNode>(Reg3)->getReg();<br>
> fprintf(stderr,"Op3 is register and regnum is %d\n",op3);<br>
> }<br>
> else if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Reg3))<br>
> {<br>
> op3 = C->getZExtValue();<br>
> fprintf(stderr,"Op3 is constant and value is %d\n",op3);<br>
> }<br>
><br>
> When I run this code Reg3 is found out to be a ConstantSDNode but is stored in the register in assembly. I want to store the value in register but also need the register number to which the value is allocated.<o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">The registers are allocated much later in the pipeline. At this stage, these are virtual registers.<br>
<br>
What are you trying to achieved?<br>
<br>
Cheers,<br>
-Quentin<br>
<br>
><br>
> Thanks,<br>
> Ambuj Agrawal<br>
> _______________________________________________<br>
> LLVM Developers mailing list<br>
> <a href="mailto:LLVMdev@cs.uiuc.edu">LLVMdev@cs.uiuc.edu</a> <a href="http://llvm.cs.uiuc.edu" target="_blank">http://llvm.cs.uiuc.edu</a><br>
> <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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