<html><head><meta http-equiv="Content-Type" content="text/html charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class=""><div class="">Hi Ralph,</div><div class=""><br class=""></div><div class="">A bunch of useful options for vectorizers is listed in [1].</div><div class=""><br class=""></div><div class="">Also, what you see might be a target-independent issue, not an aarch64-specific. If you can share the code you tested I can try to explain why vectorizer fails to handle it, and hopefully we can fix it later:)</div><div class=""><br class=""></div><div class="">Thanks,</div><div class="">Michael</div><div class=""><br class=""></div><div class="">[1] <a href="http://llvm.org/docs/Vectorizers.html" class="">http://llvm.org/docs/Vectorizers.html</a></div><div class=""><br class=""></div><div class=""><br class=""></div><div><blockquote type="cite" class=""><div class="">On Feb 9, 2015, at 2:19 PM, Ralph Campbell <<a href="mailto:ralph.campbell@broadcom.com" class="">ralph.campbell@broadcom.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div class="WordSection1" style="page: WordSection1; font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;"><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><span style="color: rgb(31, 73, 125);" class="">So far, all I have tried is –O3 and with & without “-mcpu=cortex-a57”.<o:p class=""></o:p></span></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><span style="color: rgb(31, 73, 125);" class="">I’m new to LLVM so I’m not familiar with what optimization flags are available.<o:p class=""></o:p></span></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><span style="color: rgb(31, 73, 125);" class="">I tried poking around in the LLVM documentation but haven’t found a definitive list.<o:p class=""></o:p></span></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><span style="color: rgb(31, 73, 125);" class="">The clang man page is skimpy on details.<o:p class=""></o:p></span></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><span style="color: rgb(31, 73, 125);" class=""> </span></div><div class=""><div style="border-style: solid none none; border-top-color: rgb(181, 196, 223); border-top-width: 1pt; padding: 3pt 0in 0in;" class=""><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><b class=""><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class="">From:</span></b><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class=""><span class="Apple-converted-space"> </span>Arnaud A. de Grandmaison [<a href="mailto:arnaud.degrandmaison@arm.com" class="">mailto:arnaud.degrandmaison@arm.com</a>]<span class="Apple-converted-space"> </span><br class=""><b class="">Sent:</b><span class="Apple-converted-space"> </span>Monday, February 09, 2015 2:11 PM<br class=""><b class="">To:</b><span class="Apple-converted-space"> </span>Ralph Campbell<br class=""><b class="">Cc:</b><span class="Apple-converted-space"> </span><a href="mailto:llvmdev@cs.uiuc.edu" class="">llvmdev@cs.uiuc.edu</a><br class=""><b class="">Subject:</b><span class="Apple-converted-space"> </span>RE: aarch64 status for generating SIMD instructions<o:p class=""></o:p></span></div></div></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><o:p class=""> </o:p></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><span lang="EN-GB" style="color: rgb(31, 73, 125);" class="">Which compiler flags have you been using ?<o:p class=""></o:p></span></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><span lang="EN-GB" style="color: rgb(31, 73, 125);" class=""> </span></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><span lang="EN-GB" style="color: rgb(31, 73, 125);" class="">There is definitely support for AArch64’s SIMD instructions, but their use depends on what the vectorizers can do with your code.<o:p class=""></o:p></span></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><span lang="EN-GB" style="color: rgb(31, 73, 125);" class=""> </span></div><div style="border-style: none none none solid; border-left-color: blue; border-left-width: 1.5pt; padding: 0in 0in 0in 4pt;" class=""><div class=""><div style="border-style: solid none none; border-top-color: rgb(181, 196, 223); border-top-width: 1pt; padding: 3pt 0in 0in;" class=""><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><b class=""><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class="">From:</span></b><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class=""><span class="Apple-converted-space"> </span><a href="mailto:llvmdev-bounces@cs.uiuc.edu" style="color: purple; text-decoration: underline;" class="">llvmdev-bounces@cs.uiuc.edu</a><span class="Apple-converted-space"> </span>[<a href="mailto:llvmdev-bounces@cs.uiuc.edu" style="color: purple; text-decoration: underline;" class="">mailto:llvmdev-bounces@cs.uiuc.edu</a>]<span class="Apple-converted-space"> </span><b class="">On Behalf Of<span class="Apple-converted-space"> </span></b>Ralph Campbell<br class=""><b class="">Sent:</b><span class="Apple-converted-space"> </span>09 February 2015 22:30<br class=""><b class="">To:</b><span class="Apple-converted-space"> </span><a href="mailto:llvmdev@cs.uiuc.edu" style="color: purple; text-decoration: underline;" class="">llvmdev@cs.uiuc.edu</a><br class=""><b class="">Subject:</b><span class="Apple-converted-space"> </span>[LLVMdev] aarch64 status for generating SIMD instructions<o:p class=""></o:p></span></div></div></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><span lang="EN-GB" class=""> </span></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class="">I’m using Fedora 22 and gcc 4.9.2 to run llvm 3.5.1 on an ARM Juno reference box (cortex A53 & A57).<o:p class=""></o:p></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class="">I tried compiling some simple functions like dot product and axpy() into assembly to see if any of the SIMD instructions were generated (they weren’t).<o:p class=""></o:p></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class="">Perhaps I’m missing some compiler flag to enable it.<o:p class=""></o:p></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class=""><o:p class=""> </o:p></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class="">Does anyone know what the status is for aarch64 generating SIMD instructions?<o:p class=""></o:p></div><div style="margin: 0in 0in 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif;" class="">Anyone coordinating or leading this effort? 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