<div dir="ltr"><p>Hello Hal!</p><p>r 202294<br>Fix the aggressive anti-dep breaker's subregister definition handling</p><p>There is a problem.</p><p>For example:<br>r0.64 = {r0.32, r1.32}<br>r2.64 = {r2.32, r3.32)</p><p>def1(r0.32)<br>def2(r1.32)<br>def3(r0.32)<br>use(r0.64)</p><p>Try to rename def1(r0.32). According current algo we get smth like:</p><p>def1(r2.32)<br>def2(r1.32)<br>def3(r0.32)<br>use(r2.64)</p><p>Because r0.64 was still not defined.</p><p>Patch to fix it:</p><p>Index: lib/CodeGen/AggressiveAntiDepBreaker.cpp<br>===================================================================<br>--- lib/CodeGen/AggressiveAntiDepBreaker.cpp (revision 227005)<br>+++ lib/CodeGen/AggressiveAntiDepBreaker.cpp (working copy)<br>@@ -326,6 +326,7 @@<br> void AggressiveAntiDepBreaker::PrescanInstruction(MachineInstr *MI,<br>                                                   unsigned Count,<br>                                              std::set<unsigned>& PassthruRegs) {<br>+  std::vector<unsigned> &KillIndices = State->GetKillIndices();<br>   std::vector<unsigned> &DefIndices = State->GetDefIndices();<br>   std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&<br>     RegRefs = State->GetRegRefs();<br>@@ -396,7 +397,7 @@<br> <br>     // Update def for Reg and aliases.<br>     for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {<br>-      // We need to be careful here not to define already-live super registers.<br>+      // We need to be careful here to define already-live super registers.<br>       // If the super register is already live, then this definition is not<br>       // a definition of the whole super register (just a partial insertion<br>       // into it). Earlier subregister definitions (which we've not yet visited<br>@@ -403,7 +404,16 @@<br>       // because we're iterating bottom-up) need to be linked to the same group<br>       // as this definition.<br>       if (TRI->isSuperRegister(Reg, *AI) && State->IsLive(*AI))<br>-        continue;<br>+        for (MCSubRegIterator SubR(*AI, TRI, false); SubR.isValid(); ++SubR)<br>+          if (!TRI->isSubRegister(*SubR, Reg) &&<br>+              // We get only not defined *SubR.<br>+              // If *SubR was defined then *AI is not live but it is.<br>+              // So we can use IsLive check for *SubR.<br>+              (!State->IsLive(*SubR) ||<br>+               KillIndices[*SubR] < KillIndices[*AI])) {<br>+            KillIndices[*SubR] = KillIndices[*AI];<br>+            DefIndices[*SubR] = DefIndices[*AI];<br>+          }<br> <br>       DefIndices[*AI] = Count;<br>     }<br></p></div>