<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Hi,<div class=""><br class=""></div><div class="">Can you provide a reproducible example? I feel especially your first IR sample is incomplete.</div><div class="">If you can also make more explicit how is the generated code wrong?</div><div class=""><br class=""></div><div class="">You can give a C file if you are sure that it is reproducible with the current clang.</div><div class=""><br class=""></div><div class="">Thanks,</div><div class=""><br class=""></div><div class="">Mehdi</div><div class=""><br class=""><div><blockquote type="cite" class=""><div class="">On Jan 18, 2015, at 5:13 PM, Chris Sears <<a href="mailto:chris.sears@gmail.com" class="">chris.sears@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class="">I'm tracking down an X86 code generation malfeasance regarding BT (bit test) and I have some questions.<div class=""><br class=""></div><div class="">This IR <b class="">matches</b> and then <i class="">X86TargetLowering::LowerToBT </i><b class="">is called:</b></div><div class=""><br class=""></div><blockquote style="margin:0px 0px 0px 40px;border:none;padding:0px" class=""><div class="">%and = and i64 %shl, %val <i class=""> ; (val & (1 << index)) != 0 ; </i>bit test with a <b class="">register</b> index</div></blockquote><div class=""><br class=""></div><div class="">This IR <b class="">does not match</b> and so <i class="">X86TargetLowering::LowerToBT </i><b class="">is not called<i class="">:</i></b></div><div class=""><br class=""></div><div class=""><blockquote style="margin:0px 0px 0px 40px;border:none;padding:0px" class="">%and = lshr i64 %val, 25 <i class=""> ; (val & (1 </i><i class=""><< 25)) != 0 ; </i>bit test with an <b class="">immediate</b> index<br class=""></blockquote></div><blockquote style="margin:0px 0px 0px 40px;border:none;padding:0px" class=""><div class=""><div class="">%conv = and i64 %and, 1</div></div></blockquote><div class=""><br class=""></div><div class="">Let's back that up a bit. Clang emits this IR. These expressions start out life in C as <i class="">and with a left shifted masking bit</i>, and are then converted into IR as <i class="">right shifted values anded with a masking bit</i>.</div><div class=""><br class=""></div><div class="">This IR then remains untouched until <i class="">Expand ISel Pseudo-instructions</i> in llc (-O3). At that point, <i class="">LowerToBT</i> is called on the REGISTER version and substitutes in a BT reg,reg instruction:</div><div class=""><br class=""></div><div class=""><blockquote style="margin:0px 0px 0px 40px;border:none;padding:0px" class=""><div class=""><div class="">btq<span class="" style="white-space:pre"> </span>%rsi, %rdi ## <MCInst #312 BT64rr</div></div></blockquote><br class=""></div><div class="">The IMMEDIATE version doesn't match the pattern and so <i class="">LowerToBT</i> is not called.</div><div class=""><br class=""></div><div class=""><b class="">Question</b>: This is during <i class="">pseudo instruction expansion</i>. How could <i class="">LowerToBT'</i>s caller have enough context to match the immediate IR version? In fact, lli isn't calling <i class="">LowerToBT</i> so it isn't matching. But isn't this really a <i class="">peephole optimization</i> issue?</div><div class=""><br class=""></div><div class="">LLVM has a generic peephole optimizer, <i class="">CodeGen/PeepholeOptimizer.cpp </i>which has exactly one subclass in <i class="">NVPTXTargetMachine.cpp.</i></div><div class=""><br class=""></div><div class="">But isn't it better to deal with X86 <i class="">LowerToBT</i> in a <i class="">PeepholeOptimizer</i> subclass where you have a small window of instructions rather than during pseudo instruction expansion where you have really one instruction? <i class="">PeepholeOptimizer </i>doesn't seem to be getting much attention and certainly no attention at the subclass level.</div><div class=""><br class=""></div><div class="">Bluntly, expansion is about expansion. Peephole optimization is the opposite.</div><div class=""><div class=""><div class=""><br class=""></div></div></div><div class=""><b class="">Question</b>: Regardless, why is <i class="">LowerToBT</i> not being called for the IMMEDIATE version? I suppose you could look at the preceding instruction in the DAG. That seems a bit hacky<i class="">.</i></div><div class=""><i class=""><br class=""></i></div><div class="">Another approach using <i class="">LowerToBT</i> would be to match <i class="">lshr reg/imm</i> first and then if the <i class="">following</i> instruction was an <i class="">and reg,1 </i>replace both with a BT<i class="">. </i>It doesn't look like <i class="">LowerToBT</i> as is can do that right now since it is matching the <i class="">and</i> instruction.</div><div class=""><br class=""></div><div class=""><blockquote style="margin:0px 0px 0px 40px;border:none;padding:0px" class=""><div class=""><div class="">SDValue X86TargetLowering::LowerToBT(<b class="">SDValue <u class="">And</u></b>, ISD::CondCode CC, SDLoc dl, SelectionDAG &DAG) const { ... }</div></div></blockquote><br class=""></div><div class="">But I think this is better done in a subclass of <i class="">CodeGen/PeepholeOptimizer.cpp.</i></div><div class=""><i class=""><br class=""></i></div><div class="">thanks.</div><div class=""><br class=""></div></div>
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