<div dir="ltr">Fixed in r224846</div><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Dec 25, 2014 at 8:58 PM, Craig Topper <span dir="ltr"><<a href="mailto:craig.topper@gmail.com" target="_blank">craig.topper@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">The IMM3/IMM5 come from here<div><br></div><div>







<p><span>X86RecognizableInstr.cpp</span></p>
<p><span>943 </span><span>  TYPE("SSECC",               TYPE_IMM3)</span></p>
<p><span>944</span><span>:  TYPE("AVXCC",               TYPE_</span><span>IMM5</span><span>)</span></p></div></div><div class="gmail_extra"><div><div class="h5"><br><div class="gmail_quote">On Thu, Dec 25, 2014 at 8:22 PM, Jun Koi <span dir="ltr"><<a href="mailto:junkoi2004@gmail.com" target="_blank">junkoi2004@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote"><div><div>On Fri, Dec 26, 2014 at 11:54 AM, Jun Koi <span dir="ltr"><<a href="mailto:junkoi2004@gmail.com" target="_blank">junkoi2004@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir="ltr">hi,<br><br>some instructions mismatch between assembler & disassembler, like below.<br>it seems this happens with all SSECC related instructions?<br><br>thanks,<br>Jun<br><br><br><br>$ echo "cmpps xmm1, xmm2, 23" | ./Release+Asserts/bin/llvm-mc -assemble -triple=x86_64 --output-asm-variant=1 -x86-asm-syntax=intel -show-encoding<br>    .text<br>    cmpps    xmm1, xmm2, 23          # encoding: [0x0f,0xc2,0xca,0x17]<br><br><br>$ echo "0x0f,0xc2,0xca,0x17"|./Release+Asserts/bin/llvm-mc -disassemble -triple=x86_64 --output-asm-variant=1<br>    .text<br><stdin>:1:1: warning: invalid instruction encoding<br>0x0f,0xc2,0xca,0x17<br></div></blockquote><div><br></div></div></div><div>i am trying to figure out why this bug happens. according to the code in X86DisassemblerDecoder.cpp, the last operand of CMPSS is checked against TYPE_IMM5 (to be in the range [0, 31]), but i cannot find this TYPE_IMM5 value anywhere in the definition of CMPSS, as below. <br>can somebody please enlighten me?<br><br></div><div>thanks!<br><br>// sse12_cmp_packed - sse 1 & 2 compare packed instructions<br>multiclass sse12_cmp_packed<RegisterClass RC, X86MemOperand x86memop,<br>                            Operand CC, Intrinsic Int, string asm,<br>                            string asm_alt, Domain d,<br>                            OpndItins itins = SSE_ALU_F32P> {<br>  def rri : PIi8<0xC2, MRMSrcReg,<br>             (outs RC:$dst), (ins RC:$src1, RC:$src2, CC:$cc), asm,<br>             [(set RC:$dst, (Int RC:$src1, RC:$src2, imm:$cc))],<br>             itins.rr, d>,<br>            Sched<[WriteFAdd]>;<br>  def rmi : PIi8<0xC2, MRMSrcMem,<br>             (outs RC:$dst), (ins RC:$src1, x86memop:$src2, CC:$cc), asm,<br>             [(set RC:$dst, (Int RC:$src1, (memop addr:$src2), imm:$cc))],<br>             itins.rm, d>,<br>            Sched<[WriteFAddLd, ReadAfterLd]>;<br><br>  // Accept explicit immediate argument form instead of comparison code.<br>  let isAsmParserOnly = 1, hasSideEffects = 0 in {<br>    def rri_alt : PIi8<0xC2, MRMSrcReg,<br>               (outs RC:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc),<br>               asm_alt, [], itins.rr, d>, Sched<[WriteFAdd]>;<br>    def rmi_alt : PIi8<0xC2, MRMSrcMem,<br>               (outs RC:$dst), (ins RC:$src1, x86memop:$src2, i8imm:$cc),<br>               asm_alt, [], itins.rm, d>,<br>               Sched<[WriteFAddLd, ReadAfterLd]>;<br>  }<br>}<br><br><br>let Constraints = "$src1 = $dst" in {                                                                 <br>  defm CMPPS : sse12_cmp_packed<VR128, f128mem, SSECC, int_x86_sse_cmp_ps,                            <br>                 "cmp${cc}ps\t{$src2, $dst|$dst, $src2}",                                             <br>                 "cmpps\t{$cc, $src2, $dst|$dst, $src2, $cc}",                                        <br>                 SSEPackedSingle, SSE_ALU_F32P>, PS;                                                  <br>  defm CMPPD : sse12_cmp_packed<VR128, f128mem, SSECC, int_x86_sse2_cmp_pd,                           <br>                 "cmp${cc}pd\t{$src2, $dst|$dst, $src2}",                                             <br>                 "cmppd\t{$cc, $src2, $dst|$dst, $src2, $cc}",                                        <br>                 SSEPackedDouble, SSE_ALU_F64P>, PD;                                                  <br>}                                                                                                     <br><br></div><div> <br></div></div><br></div></div>
</blockquote></div><br><br clear="all"><div><br></div></div></div><span class="HOEnZb"><font color="#888888">-- <br><div>~Craig</div>
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</blockquote></div><br><br clear="all"><div><br></div>-- <br><div class="gmail_signature">~Craig</div>
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