<div dir="ltr">Hi Tim,<div><br></div><div>Thank you for this information.</div><div>I have another request for help from you,</div><div>Below is my test case,</div><div><div>iGetValueFromASM proc</div><div><span style="white-space:pre-wrap"> </span>mov rax, 5<span style="white-space:pre-wrap"> </span></div><div><span style="white-space:pre-wrap"> </span>mov rax, 5</div><div><span style="white-space:pre-wrap"> </span>mov rax, 2</div><div><span style="white-space:pre-wrap"> </span>mov rax, 5</div><div><span style="white-space:pre-wrap"> </span>mov rax, 2</div><div><span style="white-space:pre-wrap"> </span>mov rax, 112233445566</div><div><span style="white-space:pre-wrap"> </span>add rax, 2</div><div><span style="white-space:pre-wrap"> </span>mov rax, 112233445566</div><div><span style="white-space:pre-wrap"> </span>add rax, 5</div><div><span style="white-space:pre-wrap"> </span>add rax, 2</div></div><div><br></div><div>I have lowered 32bit LLVM IR,</div><div><div>%0 = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }</div><div><br></div><div>define i32 @"iGetValueFromASM@#@1400037b0"(%0*) {</div><div> %2 = getelementptr inbounds %0* %0, i32 0, i32 0</div><div> %3 = getelementptr inbounds %0* %0, i32 0, i32 1</div><div> %4 = getelementptr inbounds %0* %0, i32 0, i32 21</div><div> %5 = load i32* %4, align 4</div><div> %6 = getelementptr inbounds %0* %0, i32 0, i32 24</div><div> %7 = load i32* %6, align 4</div><div> %8 = and i32 %7, -2262</div><div> %9 = add i32 %5, 14323</div><div> store i32 564295877, i32* %2, align 4</div><div> store i32 26, i32* %3, align 4</div><div> store i32 %8, i32* %6, align 4</div><div> ret i32 %9</div><div>}</div></div><div><br></div><div>This is generated with my are written. Now, I want to test this generated, lowered x64bit IR for x86bit machine.</div><div>Please let me know how I can test this. How I can test generated LLVM IR, how I can debug this generated LLVM IR.</div><div><br></div><div>Any help will be highly appreciated.</div><div><br></div><div>Regards,</div><div>Deep</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Dec 5, 2014 at 8:25 PM, Tim Northover <span dir="ltr"><<a href="mailto:t.p.northover@gmail.com" target="_blank">t.p.northover@gmail.com</a>></span> wrote:<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hi Sandeep,<br>
<span class=""><br>
On 4 December 2014 at 19:47, Sandeep Kumar Singh <<a href="mailto:deepdondo007@gmail.com">deepdondo007@gmail.com</a>> wrote:<br>
> As per my requirement, I am trying to lower down the x86_64bit binary LLVM<br>
> IR to x86 LLVM IR.<br>
> Instruction of x86_64 binary are as follows,<br>
> mov rax, 1122334455667788<br>
> mov rax, 8877665544332211<br>
> To lower down the same in x86, I need to split 'rax' register into<br>
> 'rax_lower' and 'rax_higher'.<br>
<br>
</span>If you just want *some* code, then LLVM can take care of this itself.<br>
You just have to compile the IR for a x86 target: "llc -mtriple=i686<br>
..." or similar.<br>
<br>
For example if you compile<br>
<br>
define i64 @foo() {<br>
ret i64 1122334455667788<br>
}<br>
<br>
to i686, you get:<br>
<br>
foo:<br>
movl $-628319156, %eax # imm = 0xFFFFFFFFDA8C9C4C<br>
movl $261313, %edx # imm = 0x3FCC1<br>
retl<br>
<br>
where the value obviously gets returned in eax & edx.<br>
<br>
On the other hand, if you want the result to be compatible with real<br>
x86 code, or even itself, you've probably got an impossible task. A<br>
few of the big problems are:<br>
<br>
1. Because of the differing alignment requirements struct layout will<br>
be completely different. Code is allowed to rely on that ("malloc(N *<br>
sizeof(type))" is a common C idiom that would break irretrievably).<br>
2. The va_arg implementation is completely incompatible between the<br>
two, and implemented entirely by Clang on x86_64. Varargs functions<br>
won't work even if all code is compiled in this odd x86_64 -> x86 way.<br>
3. The actual types used in parameter passing are different based on<br>
the target (at least, they are on other platforms). Clang needs to<br>
know the destination ABI to get this right and reconstructing the<br>
intent would likely not be possible (I can't say for sure since I<br>
haven't studied the x86 ABIs).<br>
<br>
It all comes down to the fact that LLVM IR isn't target independent.<br>
Clang has to know quite a lot of individual platform details to emit<br>
its code, and they're pretty much baked in.<br>
<br>
The PNaCl project is an effort to make a common subset work across<br>
multiple platforms. Have you looked into whether that would fit your<br>
needs? The output won't be compatible with the usual platform<br>
libraries, but will with its own runtime.<br>
<br>
Cheers.<br>
<span class="HOEnZb"><font color="#888888"><br>
Tim.<br>
</font></span></blockquote></div><br clear="all"><div><br></div>-- <br><div class="gmail_signature"><br>Thanks and Regards,<br>Sandeep Kumar Singh</div>
</div>