<div dir="ltr">Got it now. Thanks!</div><div class="gmail_extra"><br><div class="gmail_quote">2014-10-14 16:32 GMT+08:00 Jeremy Lakeman <span dir="ltr"><<a href="mailto:Jeremy.Lakeman@gmail.com" target="_blank">Jeremy.Lakeman@gmail.com</a>></span>:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">The mem2reg pass will translate stack based variables into virtual registers & phi nodes, except for cases where the stack address is required.<br></div><div class="HOEnZb"><div class="h5"><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Oct 14, 2014 at 1:54 PM, Qingan Li <span dir="ltr"><<a href="mailto:ww345ww@gmail.com" target="_blank">ww345ww@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Hal's advice helps me a lot to understand the implementation much better. Thanks so much!<div><br></div><div>So, now I am able to state my problem more clearly:<br>1) There are two kinds of locals, i.e., the local variables originated from the source code (like C/C++), and the compilation generated temporaries. After instruction selection phase, the former is seen as frame indexes, while the latter is seen as virtual registers.</div><div>2) The LiveInterval analysis computes the live intervals for virtual registers, which are then used for register allocation.</div><div>3) The register allocator spills some virtual registers as stack slot, and provides the information to LiveStack analysis, which is used for stack slot coloring.</div><div><br></div><div>So, <b>it seems the stack slot coloring deals with only the compilation generated temporaries, but not the local variables from the source code.</b></div><div>Am I right?</div><div>And, why it doesn't support the overlay of local variables? The reason is, it may do harm to the source code level debug? Or it involves complicated alias analysis?</div><div>If I want to do it by myself, any further advice?</div><div><div><div><br></div><div><br>2014-10-13 23:32 GMT+08:00 Hal Finkel <<a href="mailto:hfinkel@anl.gov" target="_blank">hfinkel@anl.gov</a>>:<br>><br>> ----- Original Message -----<br>> > From: "Qingan Li" <<a href="mailto:ww345ww@gmail.com" target="_blank">ww345ww@gmail.com</a>><br>> > To: <a href="mailto:llvmdev@cs.uiuc.edu" target="_blank">llvmdev@cs.uiuc.edu</a><br>> > Sent: Monday, October 13, 2014 8:29:38 AM<br>> > Subject: [LLVMdev] Problem of stack slot coloring<br>> ><br>> > Hi,<br>> ><br>> ><br>> > Can anyone help me with the stack slot coloring optimization?<br>> > This corresponding file is /lib/codegen/stackslotcoloring.cpp.<br>> ><br>> ><br>> > It is said this optimization was for stack slot overlay for frame<br>> > size reduction, after register allocation phase.<br>> > And this transformation pass relies on the LiveStack analysis pass.<br>> ><br>> ><br>> > How, when checking the source code, it seems the LiveStack analysis<br>> > has not been implemented, since the code was found in<br>> > LiveStackAnalysis.cpp:<br>> ><br>> ><br>> > bool LiveStacks::runOnMachineFunction(MachineFunction &MF) {<br>> > TRI = MF.getTarget().getRegisterInfo();<br>> > // FIXME: No analysis is being done right now. We are relying on the<br>> > // register allocators to provide the information.<br>> > return false;<br>> > }<br>> ><br>> ><br>> > And I found the greedy register allocator did nothing to fill the<br>> > LiveStackAnalysis:: S2IMap, which is critical for the stack slot<br>> > coloring.<br>><br>> It seems that the relevant piece of code is in lib/CodeGen/InlineSpiller.cpp:<br>><br>> /// spillAll - Spill all registers remaining after rematerialization.<br>> void InlineSpiller::spillAll() {<br>> // Update LiveStacks now that we are committed to spilling.<br>> if (StackSlot == VirtRegMap::NO_STACK_SLOT) {<br>> StackSlot = VRM.assignVirt2StackSlot(Original);<br>> StackInt = &LSS.getOrCreateInterval(StackSlot, MRI.getRegClass(Original));<br>> StackInt->getNextValue(SlotIndex(), LSS.getVNInfoAllocator());<br>> } else<br>> StackInt = &LSS.getInterval(StackSlot);<br>><br>> if (Original != Edit->getReg())<br>> VRM.assignVirt2StackSlot(Edit->getReg(), StackSlot);<br>><br>> assert(StackInt->getNumValNums() == 1 && "Bad stack interval values");<br>> for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i)<br>> StackInt->MergeSegmentsInAsValue(LIS.getInterval(RegsToSpill[i]),<br>> StackInt->getValNumInfo(0));<br>> DEBUG(dbgs() << "Merged spilled regs: " << *StackInt << '\n');<br>><br>> And this is called by the register allocator in RAGreedy::selectOrSplitImpl.<br>><br>> When the InlineSpiller calls LSS.getOrCreateInterval, that is a call to LiveStacks::getOrCreateInterval, and that updates the S2IMap inside of LiveStacks.<br>><br>> -Hal<br>><br>> > Furthermore, the LiveInterval analysis only computes live intervals<br>> > for virtual registers, but not for stack slots which has frame<br>> > indexes. Does it mean this optimization has not been implemented yet<br>> > ? And any advice for me to do it by myself?<br>> > Or am I misunderstanding the implementation?<br>> ><br>> ><br>> > I really need some advice eagerly!<br>> > Any help is greatly appreciated!<br>> ><br>> ><br>> > --<br>> > Best regards,<br>> ><br>> ><br>> > Li Qingan<br>> > _______________________________________________<br>> > LLVM Developers mailing list<br>> > <a href="mailto:LLVMdev@cs.uiuc.edu" target="_blank">LLVMdev@cs.uiuc.edu</a> <a href="http://llvm.cs.uiuc.edu" target="_blank">http://llvm.cs.uiuc.edu</a><br>> > <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br>> ><br>><br>> --<br>> Hal Finkel<br>> Assistant Computational Scientist<br>> Leadership Computing Facility<br>> Argonne National Laboratory<br><br><br><br><br>-- <br>Best regards,<br><br>Li Qingan</div></div></div></div>
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</div></div></blockquote></div><br><br clear="all"><div><br></div>-- <br>Best regards,<div><br></div><div>Li Qingan</div>
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