llvm.nvvm.barrier0 corresponds to __syncthreads in CUDA. Moving around the arithmetic instructions in your example should be fine, because they do not access memory. <br><div><br></div><div>Jingyue</div><br><div class="gmail_quote">On Tue Sep 30 2014 at 10:45:00 AM RAVI KORSA <<a href="mailto:ravi.korsa@gmail.com">ravi.korsa@gmail.com</a>> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div><div>I have written test.ll as below and ran 'opt' on it as <br>" opt -std-compile-opts test.ll -S -o -" . But the output shows that there is code motion around the barrier intrinsics.<br><br></div>test.ll<br>-------<br>; ModuleID = 'test.bc'<br><br>define void @test(i16* %I_0, i16* %I_1, i16* %I_2, i16* %I_3, i16* %O_0) {<br>entry:<br> %T_0 = load volatile i16* %I_0<br> %T_1 = load volatile i16* %I_1 <br> %T_2 = load volatile i16* %I_2 <br> %T_3 = load volatile i16* %I_3 <br> call void @llvm.nvvm.barrier0()<br> %T_5 = add i16 %T_1, %T_3<br> call void @llvm.nvvm.barrier0()<br> %T_7 = mul i16 %T_0, %T_2<br> %T_8 = xor i16 %T_2, %T_0<br> %T_9 = mul i16 %T_0, %T_1<br> call void @llvm.nvvm.barrier0()<br> %T_11 = sub i16 %T_7, %T_5<br> %T_12 = add i16 %T_8, %T_9 <br> %T_13 = add i16 %T_11, %T_12<br> store volatile i16 %T_13, i16* %O_0 <br> ret void<br>}<br><br>;declare i32 @llvm.nvvm.read.ptx.sreg.tid.x()<br>declare void @llvm.nvvm.barrier0()<br><br></div>output <br>---------<br>define
void @test(i16* nocapture %I_0, i16* nocapture %I_1, i16* nocapture
%I_2, i16* nocapture %I_3, i16* nocapture %O_0) nounwind {<br>entry:<br> %T_0 = load volatile i16* %I_0<br> %T_1 = load volatile i16* %I_1<br> %T_2 = load volatile i16* %I_2<br> %T_3 = load volatile i16* %I_3<br> tail call void @llvm.nvvm.barrier0()<br> tail call void @llvm.nvvm.barrier0()<br> %T_8 = xor i16 %T_2, %T_0<br> tail call void @llvm.nvvm.barrier0()<br> %sum = add i16 %T_3, %T_1<br> %tmp = add i16 %T_2, %T_1<br> %tmp1 = mul i16 %tmp, %T_0<br> %T_11 = sub i16 %T_8, %sum<br> %T_13 = add i16 %T_11, %tmp1<br> store volatile i16 %T_13, i16* %O_0<br> ret void<br>}<br><br>Thanks</div><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Sep 30, 2014 at 9:50 PM, Eli Bendersky <span dir="ltr"><<a href="mailto:eliben@google.com" target="_blank">eliben@google.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote"><span>On Tue, Sep 30, 2014 at 9:04 AM, RAVI KORSA <span dir="ltr"><<a href="mailto:ravi.korsa@gmail.com" target="_blank">ravi.korsa@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex"><div dir="ltr"><div><div>is there any guarantee that the nvptx intrinsic "llvm.nvvm.barrier0" will not be moved around by opt ?<br>In other words, can I expect all the instructions above "llvm.nvvm.barrier0" to remain above it and those below it to remain below, after all the opt passes are run ?<br></div></div></div></blockquote><div><br></div></span><div>AFAIU, yes. Here's the definition:</div><div><br></div><div> def int_nvvm_barrier0 : GCCBuiltin<"__nvvm_bar0">,</div><div> Intrinsic<[], [], [IntrNoDuplicate]>;</div><div><br></div><div>Note that IntrNoDuplicate is the only intrinsic attribute. It has no other attributes (like IntrNoMem) that would make it permissible for LLVM optimizations to reorder things around it. By default, the optimizers would not do this for function calls; only if these function calls are marked with special attributes that permit this.</div><span><font color="#888888"><div><br></div><div>Eli</div><div><br></div></font></span></div></div></div>
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